Understanding output of lscpu

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You can see the output from lscpu command -



jack@042:~$ lscpu
Architecture: x86_64
CPU op-mode(s): 32-bit, 64-bit
Byte Order: Little Endian
CPU(s): 56
On-line CPU(s) list: 0-55
Thread(s) per core: 2
Core(s) per socket: 14
Socket(s): 2
NUMA node(s): 2
Vendor ID: GenuineIntel
CPU family: 6
Model: 79
Model name: Intel(R) Xeon(R) CPU E5-2690 v4 @ 2.60GHz
Stepping: 1
CPU MHz: 2600.000
CPU max MHz: 2600.0000
CPU min MHz: 1200.0000
BogoMIPS: 5201.37
Virtualization: VT-x
Hypervisor vendor: vertical
Virtualization type: full
L1d cache: 32K
L1i cache: 32K
L2 cache: 256K
L3 cache: 35840K
NUMA node0 CPU(s): 0-13,28-41
NUMA node1 CPU(s): 14-27,42-55


I can see that there are 2 sockets (which is like a processor ??) and inside each of the socket we have 14 cores. So, in total 2x14=28 physical cores. Normally, a CPU can contain multiple cores, so number of CPUs can never be smaller than number of Cores. But, as shown in the output CPUs(s): 56 and this is what is confusing me.



I can see that Thread(s) per core: 2, so these 28 cores can behave like 2x28=56 logical cores.



Question 1: What does this CPUs(s): 56 denote? Does CPU(s) denote number of Virtual/Logical core, as it cannot be a Physical core core atleast?



Question 2: What does this NUMA node mean? Does it represent the socket?










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    You can see the output from lscpu command -



    jack@042:~$ lscpu
    Architecture: x86_64
    CPU op-mode(s): 32-bit, 64-bit
    Byte Order: Little Endian
    CPU(s): 56
    On-line CPU(s) list: 0-55
    Thread(s) per core: 2
    Core(s) per socket: 14
    Socket(s): 2
    NUMA node(s): 2
    Vendor ID: GenuineIntel
    CPU family: 6
    Model: 79
    Model name: Intel(R) Xeon(R) CPU E5-2690 v4 @ 2.60GHz
    Stepping: 1
    CPU MHz: 2600.000
    CPU max MHz: 2600.0000
    CPU min MHz: 1200.0000
    BogoMIPS: 5201.37
    Virtualization: VT-x
    Hypervisor vendor: vertical
    Virtualization type: full
    L1d cache: 32K
    L1i cache: 32K
    L2 cache: 256K
    L3 cache: 35840K
    NUMA node0 CPU(s): 0-13,28-41
    NUMA node1 CPU(s): 14-27,42-55


    I can see that there are 2 sockets (which is like a processor ??) and inside each of the socket we have 14 cores. So, in total 2x14=28 physical cores. Normally, a CPU can contain multiple cores, so number of CPUs can never be smaller than number of Cores. But, as shown in the output CPUs(s): 56 and this is what is confusing me.



    I can see that Thread(s) per core: 2, so these 28 cores can behave like 2x28=56 logical cores.



    Question 1: What does this CPUs(s): 56 denote? Does CPU(s) denote number of Virtual/Logical core, as it cannot be a Physical core core atleast?



    Question 2: What does this NUMA node mean? Does it represent the socket?










    share|improve this question

























      up vote
      1
      down vote

      favorite









      up vote
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      down vote

      favorite











      You can see the output from lscpu command -



      jack@042:~$ lscpu
      Architecture: x86_64
      CPU op-mode(s): 32-bit, 64-bit
      Byte Order: Little Endian
      CPU(s): 56
      On-line CPU(s) list: 0-55
      Thread(s) per core: 2
      Core(s) per socket: 14
      Socket(s): 2
      NUMA node(s): 2
      Vendor ID: GenuineIntel
      CPU family: 6
      Model: 79
      Model name: Intel(R) Xeon(R) CPU E5-2690 v4 @ 2.60GHz
      Stepping: 1
      CPU MHz: 2600.000
      CPU max MHz: 2600.0000
      CPU min MHz: 1200.0000
      BogoMIPS: 5201.37
      Virtualization: VT-x
      Hypervisor vendor: vertical
      Virtualization type: full
      L1d cache: 32K
      L1i cache: 32K
      L2 cache: 256K
      L3 cache: 35840K
      NUMA node0 CPU(s): 0-13,28-41
      NUMA node1 CPU(s): 14-27,42-55


      I can see that there are 2 sockets (which is like a processor ??) and inside each of the socket we have 14 cores. So, in total 2x14=28 physical cores. Normally, a CPU can contain multiple cores, so number of CPUs can never be smaller than number of Cores. But, as shown in the output CPUs(s): 56 and this is what is confusing me.



      I can see that Thread(s) per core: 2, so these 28 cores can behave like 2x28=56 logical cores.



      Question 1: What does this CPUs(s): 56 denote? Does CPU(s) denote number of Virtual/Logical core, as it cannot be a Physical core core atleast?



      Question 2: What does this NUMA node mean? Does it represent the socket?










      share|improve this question















      You can see the output from lscpu command -



      jack@042:~$ lscpu
      Architecture: x86_64
      CPU op-mode(s): 32-bit, 64-bit
      Byte Order: Little Endian
      CPU(s): 56
      On-line CPU(s) list: 0-55
      Thread(s) per core: 2
      Core(s) per socket: 14
      Socket(s): 2
      NUMA node(s): 2
      Vendor ID: GenuineIntel
      CPU family: 6
      Model: 79
      Model name: Intel(R) Xeon(R) CPU E5-2690 v4 @ 2.60GHz
      Stepping: 1
      CPU MHz: 2600.000
      CPU max MHz: 2600.0000
      CPU min MHz: 1200.0000
      BogoMIPS: 5201.37
      Virtualization: VT-x
      Hypervisor vendor: vertical
      Virtualization type: full
      L1d cache: 32K
      L1i cache: 32K
      L2 cache: 256K
      L3 cache: 35840K
      NUMA node0 CPU(s): 0-13,28-41
      NUMA node1 CPU(s): 14-27,42-55


      I can see that there are 2 sockets (which is like a processor ??) and inside each of the socket we have 14 cores. So, in total 2x14=28 physical cores. Normally, a CPU can contain multiple cores, so number of CPUs can never be smaller than number of Cores. But, as shown in the output CPUs(s): 56 and this is what is confusing me.



      I can see that Thread(s) per core: 2, so these 28 cores can behave like 2x28=56 logical cores.



      Question 1: What does this CPUs(s): 56 denote? Does CPU(s) denote number of Virtual/Logical core, as it cannot be a Physical core core atleast?



      Question 2: What does this NUMA node mean? Does it represent the socket?







      cpu socket multithreading lscpu






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      edited Sep 13 at 14:00

























      asked Sep 13 at 11:16









      Oliver S

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          “CPU(s): 56” represents the number of logical cores, which equals “Thread(s) per core” × “Core(s) per socket” × “Socket(s)”. One socket is one physical CPU package (which occupies one socket on the motherboard); each socket hosts a number of physical cores, and each core can run one or more threads. In your case, you have two sockets, each containing a 14-core Xeon E5-2690 v4 CPU, and since that supports hyper-threading with two threads, each core can run two threads.



          “NUMA node” represents the memory architecture; “NUMA” stands for “non-uniform memory architecture”. In your system, each socket is attached to certain DIMM slots, and each physical CPU package contains a memory controller which handles part of the total RAM. As a result, not all physical memory is equally accessible from all CPUs: one physical CPU can directly access the memory it controls, but has to go through the other physical CPU to access the rest of memory. In your system, logical cores 0–13 and 28–41 are in one NUMA node, the rest in the other. So yes, one NUMA node equals one socket, at least in typical multi-socket Xeon systems.






          share|improve this answer




















          • Many thanks Stefan for a very enlightening answer. It's simply the best answer. I had also posted this question here - stackoverflow.com/questions/52312758/… Even though, I have accepted an answer there, but if you could post your answer there as well, others can benefit from it. Many many thanks.
            – Oliver S
            Sep 13 at 14:58











          • OK, done. (For future reference, you’re not supposed to cross-post on Stack Exchange, but since this already has answers in both sites, let’s leave it here.)
            – Stephen Kitt
            Sep 13 at 15:01










          • Sure, would be careful. Many thanks!!!
            – Oliver S
            Sep 13 at 15:02










          • Stefan, in this en.wikipedia.org/wiki/Non-uniform_memory_access#/media/… (courtesy Wikipedia link you referred in your post) - Are there 2 NUMA nodes on each socket? As I understood, in this configuration, RAM is 32 GB and each Socket has 2 NUMA nodes, with each node being shared by 1 CPU Packages consisting of 8 processors, logical or otherwise. Am I correct? In my system, as you also mentioned, there is one NUMA node per socket (NUMA node0 CPU(s): 0-13,28-41). So, I suppose this pic is not an abstraction of the architecture of my system.??
            – Oliver S
            Sep 13 at 15:41










          • That image shows the NUMA architecture of a Bulldozer CPU; your Xeon CPU has a different architecture. NUMA layouts depend on the memory controllers, not the sockets (directly); you can have one memory controller per socket (as on current Xeon), multiple memory controllers per socket, or even external memory controller(s) instead.
            – Stephen Kitt
            Sep 13 at 15:45










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          StackExchange.ready(function()
          var channelOptions =
          tags: "".split(" "),
          id: "106"
          ;
          initTagRenderer("".split(" "), "".split(" "), channelOptions);

          StackExchange.using("externalEditor", function()
          // Have to fire editor after snippets, if snippets enabled
          if (StackExchange.settings.snippets.snippetsEnabled)
          StackExchange.using("snippets", function()
          createEditor();
          );

          else
          createEditor();

          );

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          heartbeatType: 'answer',
          convertImagesToLinks: false,
          noModals: false,
          showLowRepImageUploadWarning: true,
          reputationToPostImages: null,
          bindNavPrevention: true,
          postfix: "",
          onDemand: true,
          discardSelector: ".discard-answer"
          ,immediatelyShowMarkdownHelp:true
          );



          );













           

          draft saved


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          up vote
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          down vote



          accepted










          “CPU(s): 56” represents the number of logical cores, which equals “Thread(s) per core” × “Core(s) per socket” × “Socket(s)”. One socket is one physical CPU package (which occupies one socket on the motherboard); each socket hosts a number of physical cores, and each core can run one or more threads. In your case, you have two sockets, each containing a 14-core Xeon E5-2690 v4 CPU, and since that supports hyper-threading with two threads, each core can run two threads.



          “NUMA node” represents the memory architecture; “NUMA” stands for “non-uniform memory architecture”. In your system, each socket is attached to certain DIMM slots, and each physical CPU package contains a memory controller which handles part of the total RAM. As a result, not all physical memory is equally accessible from all CPUs: one physical CPU can directly access the memory it controls, but has to go through the other physical CPU to access the rest of memory. In your system, logical cores 0–13 and 28–41 are in one NUMA node, the rest in the other. So yes, one NUMA node equals one socket, at least in typical multi-socket Xeon systems.






          share|improve this answer




















          • Many thanks Stefan for a very enlightening answer. It's simply the best answer. I had also posted this question here - stackoverflow.com/questions/52312758/… Even though, I have accepted an answer there, but if you could post your answer there as well, others can benefit from it. Many many thanks.
            – Oliver S
            Sep 13 at 14:58











          • OK, done. (For future reference, you’re not supposed to cross-post on Stack Exchange, but since this already has answers in both sites, let’s leave it here.)
            – Stephen Kitt
            Sep 13 at 15:01










          • Sure, would be careful. Many thanks!!!
            – Oliver S
            Sep 13 at 15:02










          • Stefan, in this en.wikipedia.org/wiki/Non-uniform_memory_access#/media/… (courtesy Wikipedia link you referred in your post) - Are there 2 NUMA nodes on each socket? As I understood, in this configuration, RAM is 32 GB and each Socket has 2 NUMA nodes, with each node being shared by 1 CPU Packages consisting of 8 processors, logical or otherwise. Am I correct? In my system, as you also mentioned, there is one NUMA node per socket (NUMA node0 CPU(s): 0-13,28-41). So, I suppose this pic is not an abstraction of the architecture of my system.??
            – Oliver S
            Sep 13 at 15:41










          • That image shows the NUMA architecture of a Bulldozer CPU; your Xeon CPU has a different architecture. NUMA layouts depend on the memory controllers, not the sockets (directly); you can have one memory controller per socket (as on current Xeon), multiple memory controllers per socket, or even external memory controller(s) instead.
            – Stephen Kitt
            Sep 13 at 15:45














          up vote
          2
          down vote



          accepted










          “CPU(s): 56” represents the number of logical cores, which equals “Thread(s) per core” × “Core(s) per socket” × “Socket(s)”. One socket is one physical CPU package (which occupies one socket on the motherboard); each socket hosts a number of physical cores, and each core can run one or more threads. In your case, you have two sockets, each containing a 14-core Xeon E5-2690 v4 CPU, and since that supports hyper-threading with two threads, each core can run two threads.



          “NUMA node” represents the memory architecture; “NUMA” stands for “non-uniform memory architecture”. In your system, each socket is attached to certain DIMM slots, and each physical CPU package contains a memory controller which handles part of the total RAM. As a result, not all physical memory is equally accessible from all CPUs: one physical CPU can directly access the memory it controls, but has to go through the other physical CPU to access the rest of memory. In your system, logical cores 0–13 and 28–41 are in one NUMA node, the rest in the other. So yes, one NUMA node equals one socket, at least in typical multi-socket Xeon systems.






          share|improve this answer




















          • Many thanks Stefan for a very enlightening answer. It's simply the best answer. I had also posted this question here - stackoverflow.com/questions/52312758/… Even though, I have accepted an answer there, but if you could post your answer there as well, others can benefit from it. Many many thanks.
            – Oliver S
            Sep 13 at 14:58











          • OK, done. (For future reference, you’re not supposed to cross-post on Stack Exchange, but since this already has answers in both sites, let’s leave it here.)
            – Stephen Kitt
            Sep 13 at 15:01










          • Sure, would be careful. Many thanks!!!
            – Oliver S
            Sep 13 at 15:02










          • Stefan, in this en.wikipedia.org/wiki/Non-uniform_memory_access#/media/… (courtesy Wikipedia link you referred in your post) - Are there 2 NUMA nodes on each socket? As I understood, in this configuration, RAM is 32 GB and each Socket has 2 NUMA nodes, with each node being shared by 1 CPU Packages consisting of 8 processors, logical or otherwise. Am I correct? In my system, as you also mentioned, there is one NUMA node per socket (NUMA node0 CPU(s): 0-13,28-41). So, I suppose this pic is not an abstraction of the architecture of my system.??
            – Oliver S
            Sep 13 at 15:41










          • That image shows the NUMA architecture of a Bulldozer CPU; your Xeon CPU has a different architecture. NUMA layouts depend on the memory controllers, not the sockets (directly); you can have one memory controller per socket (as on current Xeon), multiple memory controllers per socket, or even external memory controller(s) instead.
            – Stephen Kitt
            Sep 13 at 15:45












          up vote
          2
          down vote



          accepted







          up vote
          2
          down vote



          accepted






          “CPU(s): 56” represents the number of logical cores, which equals “Thread(s) per core” × “Core(s) per socket” × “Socket(s)”. One socket is one physical CPU package (which occupies one socket on the motherboard); each socket hosts a number of physical cores, and each core can run one or more threads. In your case, you have two sockets, each containing a 14-core Xeon E5-2690 v4 CPU, and since that supports hyper-threading with two threads, each core can run two threads.



          “NUMA node” represents the memory architecture; “NUMA” stands for “non-uniform memory architecture”. In your system, each socket is attached to certain DIMM slots, and each physical CPU package contains a memory controller which handles part of the total RAM. As a result, not all physical memory is equally accessible from all CPUs: one physical CPU can directly access the memory it controls, but has to go through the other physical CPU to access the rest of memory. In your system, logical cores 0–13 and 28–41 are in one NUMA node, the rest in the other. So yes, one NUMA node equals one socket, at least in typical multi-socket Xeon systems.






          share|improve this answer












          “CPU(s): 56” represents the number of logical cores, which equals “Thread(s) per core” × “Core(s) per socket” × “Socket(s)”. One socket is one physical CPU package (which occupies one socket on the motherboard); each socket hosts a number of physical cores, and each core can run one or more threads. In your case, you have two sockets, each containing a 14-core Xeon E5-2690 v4 CPU, and since that supports hyper-threading with two threads, each core can run two threads.



          “NUMA node” represents the memory architecture; “NUMA” stands for “non-uniform memory architecture”. In your system, each socket is attached to certain DIMM slots, and each physical CPU package contains a memory controller which handles part of the total RAM. As a result, not all physical memory is equally accessible from all CPUs: one physical CPU can directly access the memory it controls, but has to go through the other physical CPU to access the rest of memory. In your system, logical cores 0–13 and 28–41 are in one NUMA node, the rest in the other. So yes, one NUMA node equals one socket, at least in typical multi-socket Xeon systems.







          share|improve this answer












          share|improve this answer



          share|improve this answer










          answered Sep 13 at 12:42









          Stephen Kitt

          148k22324393




          148k22324393











          • Many thanks Stefan for a very enlightening answer. It's simply the best answer. I had also posted this question here - stackoverflow.com/questions/52312758/… Even though, I have accepted an answer there, but if you could post your answer there as well, others can benefit from it. Many many thanks.
            – Oliver S
            Sep 13 at 14:58











          • OK, done. (For future reference, you’re not supposed to cross-post on Stack Exchange, but since this already has answers in both sites, let’s leave it here.)
            – Stephen Kitt
            Sep 13 at 15:01










          • Sure, would be careful. Many thanks!!!
            – Oliver S
            Sep 13 at 15:02










          • Stefan, in this en.wikipedia.org/wiki/Non-uniform_memory_access#/media/… (courtesy Wikipedia link you referred in your post) - Are there 2 NUMA nodes on each socket? As I understood, in this configuration, RAM is 32 GB and each Socket has 2 NUMA nodes, with each node being shared by 1 CPU Packages consisting of 8 processors, logical or otherwise. Am I correct? In my system, as you also mentioned, there is one NUMA node per socket (NUMA node0 CPU(s): 0-13,28-41). So, I suppose this pic is not an abstraction of the architecture of my system.??
            – Oliver S
            Sep 13 at 15:41










          • That image shows the NUMA architecture of a Bulldozer CPU; your Xeon CPU has a different architecture. NUMA layouts depend on the memory controllers, not the sockets (directly); you can have one memory controller per socket (as on current Xeon), multiple memory controllers per socket, or even external memory controller(s) instead.
            – Stephen Kitt
            Sep 13 at 15:45
















          • Many thanks Stefan for a very enlightening answer. It's simply the best answer. I had also posted this question here - stackoverflow.com/questions/52312758/… Even though, I have accepted an answer there, but if you could post your answer there as well, others can benefit from it. Many many thanks.
            – Oliver S
            Sep 13 at 14:58











          • OK, done. (For future reference, you’re not supposed to cross-post on Stack Exchange, but since this already has answers in both sites, let’s leave it here.)
            – Stephen Kitt
            Sep 13 at 15:01










          • Sure, would be careful. Many thanks!!!
            – Oliver S
            Sep 13 at 15:02










          • Stefan, in this en.wikipedia.org/wiki/Non-uniform_memory_access#/media/… (courtesy Wikipedia link you referred in your post) - Are there 2 NUMA nodes on each socket? As I understood, in this configuration, RAM is 32 GB and each Socket has 2 NUMA nodes, with each node being shared by 1 CPU Packages consisting of 8 processors, logical or otherwise. Am I correct? In my system, as you also mentioned, there is one NUMA node per socket (NUMA node0 CPU(s): 0-13,28-41). So, I suppose this pic is not an abstraction of the architecture of my system.??
            – Oliver S
            Sep 13 at 15:41










          • That image shows the NUMA architecture of a Bulldozer CPU; your Xeon CPU has a different architecture. NUMA layouts depend on the memory controllers, not the sockets (directly); you can have one memory controller per socket (as on current Xeon), multiple memory controllers per socket, or even external memory controller(s) instead.
            – Stephen Kitt
            Sep 13 at 15:45















          Many thanks Stefan for a very enlightening answer. It's simply the best answer. I had also posted this question here - stackoverflow.com/questions/52312758/… Even though, I have accepted an answer there, but if you could post your answer there as well, others can benefit from it. Many many thanks.
          – Oliver S
          Sep 13 at 14:58





          Many thanks Stefan for a very enlightening answer. It's simply the best answer. I had also posted this question here - stackoverflow.com/questions/52312758/… Even though, I have accepted an answer there, but if you could post your answer there as well, others can benefit from it. Many many thanks.
          – Oliver S
          Sep 13 at 14:58













          OK, done. (For future reference, you’re not supposed to cross-post on Stack Exchange, but since this already has answers in both sites, let’s leave it here.)
          – Stephen Kitt
          Sep 13 at 15:01




          OK, done. (For future reference, you’re not supposed to cross-post on Stack Exchange, but since this already has answers in both sites, let’s leave it here.)
          – Stephen Kitt
          Sep 13 at 15:01












          Sure, would be careful. Many thanks!!!
          – Oliver S
          Sep 13 at 15:02




          Sure, would be careful. Many thanks!!!
          – Oliver S
          Sep 13 at 15:02












          Stefan, in this en.wikipedia.org/wiki/Non-uniform_memory_access#/media/… (courtesy Wikipedia link you referred in your post) - Are there 2 NUMA nodes on each socket? As I understood, in this configuration, RAM is 32 GB and each Socket has 2 NUMA nodes, with each node being shared by 1 CPU Packages consisting of 8 processors, logical or otherwise. Am I correct? In my system, as you also mentioned, there is one NUMA node per socket (NUMA node0 CPU(s): 0-13,28-41). So, I suppose this pic is not an abstraction of the architecture of my system.??
          – Oliver S
          Sep 13 at 15:41




          Stefan, in this en.wikipedia.org/wiki/Non-uniform_memory_access#/media/… (courtesy Wikipedia link you referred in your post) - Are there 2 NUMA nodes on each socket? As I understood, in this configuration, RAM is 32 GB and each Socket has 2 NUMA nodes, with each node being shared by 1 CPU Packages consisting of 8 processors, logical or otherwise. Am I correct? In my system, as you also mentioned, there is one NUMA node per socket (NUMA node0 CPU(s): 0-13,28-41). So, I suppose this pic is not an abstraction of the architecture of my system.??
          – Oliver S
          Sep 13 at 15:41












          That image shows the NUMA architecture of a Bulldozer CPU; your Xeon CPU has a different architecture. NUMA layouts depend on the memory controllers, not the sockets (directly); you can have one memory controller per socket (as on current Xeon), multiple memory controllers per socket, or even external memory controller(s) instead.
          – Stephen Kitt
          Sep 13 at 15:45




          That image shows the NUMA architecture of a Bulldozer CPU; your Xeon CPU has a different architecture. NUMA layouts depend on the memory controllers, not the sockets (directly); you can have one memory controller per socket (as on current Xeon), multiple memory controllers per socket, or even external memory controller(s) instead.
          – Stephen Kitt
          Sep 13 at 15:45

















           

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