Op-amp's input bias current
Clash Royale CLAN TAG#URR8PPP
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Could you please tell me how do you compute the impedance seen by the inverting input? The result is 100k//1M but according to me the voltage between the 100k and the 1M is not the same. So the resistors are not in parallel. This result is true in small signal analysis. But the input bias current is present at DC. Is there a way to resolve this problem with the thevenin's theorem ?
op-amp
edited Jan 2 at 15:40
Transistor
81.6k778176
asked Jan 2 at 14:18
LeoLeo
162
$endgroup$
add a comment |
$begingroup$
Could you please tell me how do you compute the impedance seen by the inverting input? The result is 100k//1M but according to me the voltage between the 100k and the 1M is not the same. So the resistors are not in parallel. This result is true in small signal analysis. But the input bias current is present at DC. Is there a way to resolve this problem with the thevenin's theorem ?
op-amp
edited Jan 2 at 15:40
Transistor
81.6k778176
asked Jan 2 at 14:18
LeoLeo
162
$endgroup$
1
$begingroup$
The result is 100k//1M No it is not unless there is a voltage source to ground connected at the left of the 100k resistor. As drawn there is "nothing" so the 100 k resistor does nothing. How does an opamp's output behave? Does it have a low or high output impedance? You should first think about how this circuit normally operates, what will be connected to it, how is it used?
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– Bimpelrekkie
Jan 2 at 14:30
2
$begingroup$
@Bimpelrekkie: In such circuits, it is generally understood that unknown inputs are voltage sources, unless otherwise specified.
$endgroup$
– Dave Tweed♦
Jan 2 at 14:31
3
$begingroup$
@DaveTweed Sure, but I think that is a very bad habit! Nothing is specified at the input here. How much trouble is it to put a "Vin" there and then it would be clear. Very often I see assumptions being made and assumptions are the source of many errors and misunderstandings.
$endgroup$
– Bimpelrekkie
Jan 2 at 14:32
3
$begingroup$
@Bimpelrekkie - I'm sure you are too polite to say it, but there is an old saying which goes, "When you 'assume', you make an 'ass' out of 'u' and 'me',"
$endgroup$
– WhatRoughBeast
Jan 2 at 15:50
$begingroup$
The answer must assume that the Thévenin resistance and voltage at Vin- includes the source resistance, Rs.
$endgroup$
– Sunnyskyguy EE75
Jan 2 at 18:36
add a comment |
$begingroup$
Could you please tell me how do you compute the impedance seen by the inverting input? The result is 100k//1M but according to me the voltage between the 100k and the 1M is not the same. So the resistors are not in parallel. This result is true in small signal analysis. But the input bias current is present at DC. Is there a way to resolve this problem with the thevenin's theorem ?
op-amp
edited Jan 2 at 15:40
Transistor
81.6k778176
asked Jan 2 at 14:18
LeoLeo
162
$endgroup$
Could you please tell me how do you compute the impedance seen by the inverting input? The result is 100k//1M but according to me the voltage between the 100k and the 1M is not the same. So the resistors are not in parallel. This result is true in small signal analysis. But the input bias current is present at DC. Is there a way to resolve this problem with the thevenin's theorem ?
op-amp
op-amp
edited Jan 2 at 15:40
Transistor
81.6k778176
asked Jan 2 at 14:18
LeoLeo
162
edited Jan 2 at 15:40
Transistor
81.6k778176
asked Jan 2 at 14:18
LeoLeo
162
edited Jan 2 at 15:40
Transistor
81.6k778176
edited Jan 2 at 15:40
Transistor
81.6k778176
edited Jan 2 at 15:40
Transistor
81.6k778176
81.6k778176
asked Jan 2 at 14:18
LeoLeo
162
asked Jan 2 at 14:18
LeoLeo
162
asked Jan 2 at 14:18
LeoLeo
162
162
1
$begingroup$
The result is 100k//1M No it is not unless there is a voltage source to ground connected at the left of the 100k resistor. As drawn there is "nothing" so the 100 k resistor does nothing. How does an opamp's output behave? Does it have a low or high output impedance? You should first think about how this circuit normally operates, what will be connected to it, how is it used?
$endgroup$
– Bimpelrekkie
Jan 2 at 14:30
2
$begingroup$
@Bimpelrekkie: In such circuits, it is generally understood that unknown inputs are voltage sources, unless otherwise specified.
$endgroup$
– Dave Tweed♦
Jan 2 at 14:31
3
$begingroup$
@DaveTweed Sure, but I think that is a very bad habit! Nothing is specified at the input here. How much trouble is it to put a "Vin" there and then it would be clear. Very often I see assumptions being made and assumptions are the source of many errors and misunderstandings.
$endgroup$
– Bimpelrekkie
Jan 2 at 14:32
3
$begingroup$
@Bimpelrekkie - I'm sure you are too polite to say it, but there is an old saying which goes, "When you 'assume', you make an 'ass' out of 'u' and 'me',"
$endgroup$
– WhatRoughBeast
Jan 2 at 15:50
$begingroup$
The answer must assume that the Thévenin resistance and voltage at Vin- includes the source resistance, Rs.
$endgroup$
– Sunnyskyguy EE75
Jan 2 at 18:36
add a comment |
1
$begingroup$
The result is 100k//1M No it is not unless there is a voltage source to ground connected at the left of the 100k resistor. As drawn there is "nothing" so the 100 k resistor does nothing. How does an opamp's output behave? Does it have a low or high output impedance? You should first think about how this circuit normally operates, what will be connected to it, how is it used?
$endgroup$
– Bimpelrekkie
Jan 2 at 14:30
2
$begingroup$
@Bimpelrekkie: In such circuits, it is generally understood that unknown inputs are voltage sources, unless otherwise specified.
$endgroup$
– Dave Tweed♦
Jan 2 at 14:31
3
$begingroup$
@DaveTweed Sure, but I think that is a very bad habit! Nothing is specified at the input here. How much trouble is it to put a "Vin" there and then it would be clear. Very often I see assumptions being made and assumptions are the source of many errors and misunderstandings.
$endgroup$
– Bimpelrekkie
Jan 2 at 14:32
3
$begingroup$
@Bimpelrekkie - I'm sure you are too polite to say it, but there is an old saying which goes, "When you 'assume', you make an 'ass' out of 'u' and 'me',"
$endgroup$
– WhatRoughBeast
Jan 2 at 15:50
$begingroup$
The answer must assume that the Thévenin resistance and voltage at Vin- includes the source resistance, Rs.
$endgroup$
– Sunnyskyguy EE75
Jan 2 at 18:36
1
1
$begingroup$
The result is 100k//1M No it is not unless there is a voltage source to ground connected at the left of the 100k resistor. As drawn there is "nothing" so the 100 k resistor does nothing. How does an opamp's output behave? Does it have a low or high output impedance? You should first think about how this circuit normally operates, what will be connected to it, how is it used?
$endgroup$
– Bimpelrekkie
Jan 2 at 14:30
$begingroup$
The result is 100k//1M No it is not unless there is a voltage source to ground connected at the left of the 100k resistor. As drawn there is "nothing" so the 100 k resistor does nothing. How does an opamp's output behave? Does it have a low or high output impedance? You should first think about how this circuit normally operates, what will be connected to it, how is it used?
$endgroup$
– Bimpelrekkie
Jan 2 at 14:30
2
2
$begingroup$
@Bimpelrekkie: In such circuits, it is generally understood that unknown inputs are voltage sources, unless otherwise specified.
$endgroup$
– Dave Tweed♦
Jan 2 at 14:31
$begingroup$
@Bimpelrekkie: In such circuits, it is generally understood that unknown inputs are voltage sources, unless otherwise specified.
$endgroup$
– Dave Tweed♦
Jan 2 at 14:31
3
3
$begingroup$
@DaveTweed Sure, but I think that is a very bad habit! Nothing is specified at the input here. How much trouble is it to put a "Vin" there and then it would be clear. Very often I see assumptions being made and assumptions are the source of many errors and misunderstandings.
$endgroup$
– Bimpelrekkie
Jan 2 at 14:32
$begingroup$
@DaveTweed Sure, but I think that is a very bad habit! Nothing is specified at the input here. How much trouble is it to put a "Vin" there and then it would be clear. Very often I see assumptions being made and assumptions are the source of many errors and misunderstandings.
$endgroup$
– Bimpelrekkie
Jan 2 at 14:32
3
3
$begingroup$
@Bimpelrekkie - I'm sure you are too polite to say it, but there is an old saying which goes, "When you 'assume', you make an 'ass' out of 'u' and 'me',"
$endgroup$
– WhatRoughBeast
Jan 2 at 15:50
$begingroup$
@Bimpelrekkie - I'm sure you are too polite to say it, but there is an old saying which goes, "When you 'assume', you make an 'ass' out of 'u' and 'me',"
$endgroup$
– WhatRoughBeast
Jan 2 at 15:50
$begingroup$
The answer must assume that the Thévenin resistance and voltage at Vin- includes the source resistance, Rs.
$endgroup$
– Sunnyskyguy EE75
Jan 2 at 18:36
$begingroup$
The answer must assume that the Thévenin resistance and voltage at Vin- includes the source resistance, Rs.
$endgroup$
– Sunnyskyguy EE75
Jan 2 at 18:36
add a comment |
3 Answers
3
active
oldest
votes
$begingroup$
It doesn't matter whether the two voltages are the same. Regardless of what they are, the two voltage sources and their resistors can be replaced with a single source and a single resistor (this is called the "Thévenin equivalent"). The Thévenin resistance is always simply the parallel combination of the original two resistors.
answered Jan 2 at 14:29
Dave Tweed♦Dave Tweed
118k9145256
$endgroup$
1
$begingroup$
Comments are not for extended discussion; this conversation has been moved to chat.
$endgroup$
– Dave Tweed♦
Jan 2 at 17:30
$begingroup$
It is also assumed that the Thévenin resistance and voltage at Vin- includes the source resistance.
$endgroup$
– Sunnyskyguy EE75
Jan 2 at 18:34
add a comment |
$begingroup$
DC can still be "small signal", "small signal" simply means that the changes we are looking at are sufficiciently small that nonlinear effects can be ignored.
Still I think the people bringing up impedances and thevinin are not reasoning correctly. The effective impedance at the - input of an non-saturated op-amp in negative feedback is always very low (zero for an ideal op-amp), but nevertheless small currents at that node can have a large impact on output voltage.
Instead I think we need to ask the more fundamental question "what is the affect of input bias currents on output voltage". If we assume that both inputs have the same input bias current then to avoid errors we want the affects of the two input bias currents to be of equal magnitude and opposite polarity.
Lets start with some basic assumptions.
- The op-amp has finite input bias currents but is otherwise ideal (in particular this means that all signals are small signals).
- The circuit is fed from a voltage source of zero impedance.
- We will consider an input bias current flowing in to the op-amps input to be positive and an input bias current flowing out of the op-amps input to be negative.
Assumption 1 means the circuit is linear, which means we can use the principle of superposition to seperately analyse the results of input bias currents.
Lets call the three resistors $R_F$, $R_I$ and $R_+$ for the feedback resistor, input resistor and + terminal resistor.
The inverting input is the simple one. It can't affect the voltage at the op-amps + input and hence can't affect the voltage at the op-amps - input (remember we are assuming the op-amp is otherwise ideal). So the input bias current must be supplied entirely by the op-amps ouput. So for bias currents at the inverting input we can simply calculate the resulting change in output voltage as
$V_OIB- = R_F I_B$
The non-inverting input is more complex. We first need to calculate an input voltage, then calculate a gain. The current flowing into the op-amps input requries a negative voltage at the + terminal.
$V_+ = -R_+ I_B$
We now use the non-inverting op-amp equation to calculate it's affect on output voltage.
$V_OIB+ = (1+fracR_FR_I)V_+ = -(1+fracR_FR_I)R_+ I_B$
Now add them together to get the total contribution of bias currents to output voltage.
$V_OIB = R_F I_B - (1+fracR_FR_I)R_+ I_B$
We want the bias currents to not affect the output voltage.
$V_OIB = 0$
$R_F I_B = (1+fracR_FR_I)R_+ I_B$
$R_F = (1+fracR_FR_I)R_+$
$R_+ = fracR_F(1+fracR_FR_I) = fracR_F R_IR_I + R_F$
answered Jan 2 at 18:20
Peter GreenPeter Green
11.6k11939
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Thank you for this very good explanation :D Nice to you ! :D
$endgroup$
– Leo
Jan 4 at 16:47
add a comment |
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simulate this circuit – Schematic created using CircuitLab
Let the input bias currents for the inverting and the non-inverting terminals of the op-amp be $I_B^-$ and $I_B^+$ respectively. Thus, the input bias current to the op-amp is their average. That is,
beginequation
I_B = fracI_B^- +I_B^+2
endequation
The input voltage when set to zero that is $ V_i = 0 $, then the the output voltage will be
beginequation
V_o = I_B^- R_f
endequation
Due the flow of the current $I_B^+$ the compensation resistor $R_comp$ has a voltage drop of $ V_1$. The difference of voltage between the node $a$ and the non-inverting terminal of the op-amp is zero as mentioned in the schematic.
Applying Kirchoff's voltage law,
beginequation
-V_1+V_2-V_o=0
endequation
beginequation
V_o = V_2-V_1
endequation
By selecting appropriate resistance for the compensation resistor, the output voltage can be made zero. We know that,
beginequation
V_1 = I_B^+ R_comp
endequation
beginequation
I_B^+ = fracV_1R_comp
endequation
Since, non-inverting terminal is at $-V_1$ voltage, the node $a$ is also at the same voltage with the same polarity since they have no potential difference between them.
Thus,
beginequation
I_1 = fracV_1R_1
endequation
beginequation
I_2 = fracV_2R_f
endequation
For compensation as said earlier, the output voltage must be zero since there is no input given. That is, $V_2=V_1$
Thus,
beginequation
I_2=fracV_1R_f
endequation
KCL at node $a$ gives,
beginequation
I_B^-=I_1+I_2=fracV_1R_1+fracV_1R_f
endequation
Assuming $I_B^-=I_B^+$
beginequation
fracV_1R_comp = fracV_1R_1+fracV_1R_f
endequation
Thus,
beginequation
R_comp = fracR_1R_fR_1+R_f = R_1||R_f
endequation
answered Jan 2 at 17:56
RAMASUBRAMANIYAN GRAMASUBRAMANIYAN G
415
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add a comment |
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3 Answers
3
active
oldest
votes
3 Answers
3
active
oldest
votes
active
oldest
votes
active
oldest
votes
$begingroup$
It doesn't matter whether the two voltages are the same. Regardless of what they are, the two voltage sources and their resistors can be replaced with a single source and a single resistor (this is called the "Thévenin equivalent"). The Thévenin resistance is always simply the parallel combination of the original two resistors.
answered Jan 2 at 14:29
Dave Tweed♦Dave Tweed
118k9145256
$endgroup$
1
$begingroup$
Comments are not for extended discussion; this conversation has been moved to chat.
$endgroup$
– Dave Tweed♦
Jan 2 at 17:30
$begingroup$
It is also assumed that the Thévenin resistance and voltage at Vin- includes the source resistance.
$endgroup$
– Sunnyskyguy EE75
Jan 2 at 18:34
add a comment |
$begingroup$
It doesn't matter whether the two voltages are the same. Regardless of what they are, the two voltage sources and their resistors can be replaced with a single source and a single resistor (this is called the "Thévenin equivalent"). The Thévenin resistance is always simply the parallel combination of the original two resistors.
answered Jan 2 at 14:29
Dave Tweed♦Dave Tweed
118k9145256
$endgroup$
1
$begingroup$
Comments are not for extended discussion; this conversation has been moved to chat.
$endgroup$
– Dave Tweed♦
Jan 2 at 17:30
$begingroup$
It is also assumed that the Thévenin resistance and voltage at Vin- includes the source resistance.
$endgroup$
– Sunnyskyguy EE75
Jan 2 at 18:34
add a comment |
$begingroup$
It doesn't matter whether the two voltages are the same. Regardless of what they are, the two voltage sources and their resistors can be replaced with a single source and a single resistor (this is called the "Thévenin equivalent"). The Thévenin resistance is always simply the parallel combination of the original two resistors.
answered Jan 2 at 14:29
Dave Tweed♦Dave Tweed
118k9145256
$endgroup$
It doesn't matter whether the two voltages are the same. Regardless of what they are, the two voltage sources and their resistors can be replaced with a single source and a single resistor (this is called the "Thévenin equivalent"). The Thévenin resistance is always simply the parallel combination of the original two resistors.
answered Jan 2 at 14:29
Dave Tweed♦Dave Tweed
118k9145256
answered Jan 2 at 14:29
Dave Tweed♦Dave Tweed
118k9145256
answered Jan 2 at 14:29
Dave Tweed♦Dave Tweed
118k9145256
answered Jan 2 at 14:29
Dave Tweed♦Dave Tweed
118k9145256
118k9145256
1
$begingroup$
Comments are not for extended discussion; this conversation has been moved to chat.
$endgroup$
– Dave Tweed♦
Jan 2 at 17:30
$begingroup$
It is also assumed that the Thévenin resistance and voltage at Vin- includes the source resistance.
$endgroup$
– Sunnyskyguy EE75
Jan 2 at 18:34
add a comment |
1
$begingroup$
Comments are not for extended discussion; this conversation has been moved to chat.
$endgroup$
– Dave Tweed♦
Jan 2 at 17:30
$begingroup$
It is also assumed that the Thévenin resistance and voltage at Vin- includes the source resistance.
$endgroup$
– Sunnyskyguy EE75
Jan 2 at 18:34
1
1
$begingroup$
Comments are not for extended discussion; this conversation has been moved to chat.
$endgroup$
– Dave Tweed♦
Jan 2 at 17:30
$begingroup$
Comments are not for extended discussion; this conversation has been moved to chat.
$endgroup$
– Dave Tweed♦
Jan 2 at 17:30
$begingroup$
It is also assumed that the Thévenin resistance and voltage at Vin- includes the source resistance.
$endgroup$
– Sunnyskyguy EE75
Jan 2 at 18:34
$begingroup$
It is also assumed that the Thévenin resistance and voltage at Vin- includes the source resistance.
$endgroup$
– Sunnyskyguy EE75
Jan 2 at 18:34
add a comment |
$begingroup$
DC can still be "small signal", "small signal" simply means that the changes we are looking at are sufficiciently small that nonlinear effects can be ignored.
Still I think the people bringing up impedances and thevinin are not reasoning correctly. The effective impedance at the - input of an non-saturated op-amp in negative feedback is always very low (zero for an ideal op-amp), but nevertheless small currents at that node can have a large impact on output voltage.
Instead I think we need to ask the more fundamental question "what is the affect of input bias currents on output voltage". If we assume that both inputs have the same input bias current then to avoid errors we want the affects of the two input bias currents to be of equal magnitude and opposite polarity.
Lets start with some basic assumptions.
- The op-amp has finite input bias currents but is otherwise ideal (in particular this means that all signals are small signals).
- The circuit is fed from a voltage source of zero impedance.
- We will consider an input bias current flowing in to the op-amps input to be positive and an input bias current flowing out of the op-amps input to be negative.
Assumption 1 means the circuit is linear, which means we can use the principle of superposition to seperately analyse the results of input bias currents.
Lets call the three resistors $R_F$, $R_I$ and $R_+$ for the feedback resistor, input resistor and + terminal resistor.
The inverting input is the simple one. It can't affect the voltage at the op-amps + input and hence can't affect the voltage at the op-amps - input (remember we are assuming the op-amp is otherwise ideal). So the input bias current must be supplied entirely by the op-amps ouput. So for bias currents at the inverting input we can simply calculate the resulting change in output voltage as
$V_OIB- = R_F I_B$
The non-inverting input is more complex. We first need to calculate an input voltage, then calculate a gain. The current flowing into the op-amps input requries a negative voltage at the + terminal.
$V_+ = -R_+ I_B$
We now use the non-inverting op-amp equation to calculate it's affect on output voltage.
$V_OIB+ = (1+fracR_FR_I)V_+ = -(1+fracR_FR_I)R_+ I_B$
Now add them together to get the total contribution of bias currents to output voltage.
$V_OIB = R_F I_B - (1+fracR_FR_I)R_+ I_B$
We want the bias currents to not affect the output voltage.
$V_OIB = 0$
$R_F I_B = (1+fracR_FR_I)R_+ I_B$
$R_F = (1+fracR_FR_I)R_+$
$R_+ = fracR_F(1+fracR_FR_I) = fracR_F R_IR_I + R_F$
answered Jan 2 at 18:20
Peter GreenPeter Green
11.6k11939
$endgroup$
$begingroup$
Thank you for this very good explanation :D Nice to you ! :D
$endgroup$
– Leo
Jan 4 at 16:47
add a comment |
$begingroup$
DC can still be "small signal", "small signal" simply means that the changes we are looking at are sufficiciently small that nonlinear effects can be ignored.
Still I think the people bringing up impedances and thevinin are not reasoning correctly. The effective impedance at the - input of an non-saturated op-amp in negative feedback is always very low (zero for an ideal op-amp), but nevertheless small currents at that node can have a large impact on output voltage.
Instead I think we need to ask the more fundamental question "what is the affect of input bias currents on output voltage". If we assume that both inputs have the same input bias current then to avoid errors we want the affects of the two input bias currents to be of equal magnitude and opposite polarity.
Lets start with some basic assumptions.
- The op-amp has finite input bias currents but is otherwise ideal (in particular this means that all signals are small signals).
- The circuit is fed from a voltage source of zero impedance.
- We will consider an input bias current flowing in to the op-amps input to be positive and an input bias current flowing out of the op-amps input to be negative.
Assumption 1 means the circuit is linear, which means we can use the principle of superposition to seperately analyse the results of input bias currents.
Lets call the three resistors $R_F$, $R_I$ and $R_+$ for the feedback resistor, input resistor and + terminal resistor.
The inverting input is the simple one. It can't affect the voltage at the op-amps + input and hence can't affect the voltage at the op-amps - input (remember we are assuming the op-amp is otherwise ideal). So the input bias current must be supplied entirely by the op-amps ouput. So for bias currents at the inverting input we can simply calculate the resulting change in output voltage as
$V_OIB- = R_F I_B$
The non-inverting input is more complex. We first need to calculate an input voltage, then calculate a gain. The current flowing into the op-amps input requries a negative voltage at the + terminal.
$V_+ = -R_+ I_B$
We now use the non-inverting op-amp equation to calculate it's affect on output voltage.
$V_OIB+ = (1+fracR_FR_I)V_+ = -(1+fracR_FR_I)R_+ I_B$
Now add them together to get the total contribution of bias currents to output voltage.
$V_OIB = R_F I_B - (1+fracR_FR_I)R_+ I_B$
We want the bias currents to not affect the output voltage.
$V_OIB = 0$
$R_F I_B = (1+fracR_FR_I)R_+ I_B$
$R_F = (1+fracR_FR_I)R_+$
$R_+ = fracR_F(1+fracR_FR_I) = fracR_F R_IR_I + R_F$
answered Jan 2 at 18:20
Peter GreenPeter Green
11.6k11939
$endgroup$
$begingroup$
Thank you for this very good explanation :D Nice to you ! :D
$endgroup$
– Leo
Jan 4 at 16:47
add a comment |
$begingroup$
DC can still be "small signal", "small signal" simply means that the changes we are looking at are sufficiciently small that nonlinear effects can be ignored.
Still I think the people bringing up impedances and thevinin are not reasoning correctly. The effective impedance at the - input of an non-saturated op-amp in negative feedback is always very low (zero for an ideal op-amp), but nevertheless small currents at that node can have a large impact on output voltage.
Instead I think we need to ask the more fundamental question "what is the affect of input bias currents on output voltage". If we assume that both inputs have the same input bias current then to avoid errors we want the affects of the two input bias currents to be of equal magnitude and opposite polarity.
Lets start with some basic assumptions.
- The op-amp has finite input bias currents but is otherwise ideal (in particular this means that all signals are small signals).
- The circuit is fed from a voltage source of zero impedance.
- We will consider an input bias current flowing in to the op-amps input to be positive and an input bias current flowing out of the op-amps input to be negative.
Assumption 1 means the circuit is linear, which means we can use the principle of superposition to seperately analyse the results of input bias currents.
Lets call the three resistors $R_F$, $R_I$ and $R_+$ for the feedback resistor, input resistor and + terminal resistor.
The inverting input is the simple one. It can't affect the voltage at the op-amps + input and hence can't affect the voltage at the op-amps - input (remember we are assuming the op-amp is otherwise ideal). So the input bias current must be supplied entirely by the op-amps ouput. So for bias currents at the inverting input we can simply calculate the resulting change in output voltage as
$V_OIB- = R_F I_B$
The non-inverting input is more complex. We first need to calculate an input voltage, then calculate a gain. The current flowing into the op-amps input requries a negative voltage at the + terminal.
$V_+ = -R_+ I_B$
We now use the non-inverting op-amp equation to calculate it's affect on output voltage.
$V_OIB+ = (1+fracR_FR_I)V_+ = -(1+fracR_FR_I)R_+ I_B$
Now add them together to get the total contribution of bias currents to output voltage.
$V_OIB = R_F I_B - (1+fracR_FR_I)R_+ I_B$
We want the bias currents to not affect the output voltage.
$V_OIB = 0$
$R_F I_B = (1+fracR_FR_I)R_+ I_B$
$R_F = (1+fracR_FR_I)R_+$
$R_+ = fracR_F(1+fracR_FR_I) = fracR_F R_IR_I + R_F$
answered Jan 2 at 18:20
Peter GreenPeter Green
11.6k11939
$endgroup$
DC can still be "small signal", "small signal" simply means that the changes we are looking at are sufficiciently small that nonlinear effects can be ignored.
Still I think the people bringing up impedances and thevinin are not reasoning correctly. The effective impedance at the - input of an non-saturated op-amp in negative feedback is always very low (zero for an ideal op-amp), but nevertheless small currents at that node can have a large impact on output voltage.
Instead I think we need to ask the more fundamental question "what is the affect of input bias currents on output voltage". If we assume that both inputs have the same input bias current then to avoid errors we want the affects of the two input bias currents to be of equal magnitude and opposite polarity.
Lets start with some basic assumptions.
- The op-amp has finite input bias currents but is otherwise ideal (in particular this means that all signals are small signals).
- The circuit is fed from a voltage source of zero impedance.
- We will consider an input bias current flowing in to the op-amps input to be positive and an input bias current flowing out of the op-amps input to be negative.
Assumption 1 means the circuit is linear, which means we can use the principle of superposition to seperately analyse the results of input bias currents.
Lets call the three resistors $R_F$, $R_I$ and $R_+$ for the feedback resistor, input resistor and + terminal resistor.
The inverting input is the simple one. It can't affect the voltage at the op-amps + input and hence can't affect the voltage at the op-amps - input (remember we are assuming the op-amp is otherwise ideal). So the input bias current must be supplied entirely by the op-amps ouput. So for bias currents at the inverting input we can simply calculate the resulting change in output voltage as
$V_OIB- = R_F I_B$
The non-inverting input is more complex. We first need to calculate an input voltage, then calculate a gain. The current flowing into the op-amps input requries a negative voltage at the + terminal.
$V_+ = -R_+ I_B$
We now use the non-inverting op-amp equation to calculate it's affect on output voltage.
$V_OIB+ = (1+fracR_FR_I)V_+ = -(1+fracR_FR_I)R_+ I_B$
Now add them together to get the total contribution of bias currents to output voltage.
$V_OIB = R_F I_B - (1+fracR_FR_I)R_+ I_B$
We want the bias currents to not affect the output voltage.
$V_OIB = 0$
$R_F I_B = (1+fracR_FR_I)R_+ I_B$
$R_F = (1+fracR_FR_I)R_+$
$R_+ = fracR_F(1+fracR_FR_I) = fracR_F R_IR_I + R_F$
answered Jan 2 at 18:20
Peter GreenPeter Green
11.6k11939
edited Jan 2 at 19:30
answered Jan 2 at 18:20
Peter GreenPeter Green
11.6k11939
answered Jan 2 at 18:20
Peter GreenPeter Green
11.6k11939
answered Jan 2 at 18:20
Peter GreenPeter Green
11.6k11939
11.6k11939
$begingroup$
Thank you for this very good explanation :D Nice to you ! :D
$endgroup$
– Leo
Jan 4 at 16:47
add a comment |
$begingroup$
Thank you for this very good explanation :D Nice to you ! :D
$endgroup$
– Leo
Jan 4 at 16:47
$begingroup$
Thank you for this very good explanation :D Nice to you ! :D
$endgroup$
– Leo
Jan 4 at 16:47
$begingroup$
Thank you for this very good explanation :D Nice to you ! :D
$endgroup$
– Leo
Jan 4 at 16:47
add a comment |
$begingroup$
simulate this circuit – Schematic created using CircuitLab
Let the input bias currents for the inverting and the non-inverting terminals of the op-amp be $I_B^-$ and $I_B^+$ respectively. Thus, the input bias current to the op-amp is their average. That is,
beginequation
I_B = fracI_B^- +I_B^+2
endequation
The input voltage when set to zero that is $ V_i = 0 $, then the the output voltage will be
beginequation
V_o = I_B^- R_f
endequation
Due the flow of the current $I_B^+$ the compensation resistor $R_comp$ has a voltage drop of $ V_1$. The difference of voltage between the node $a$ and the non-inverting terminal of the op-amp is zero as mentioned in the schematic.
Applying Kirchoff's voltage law,
beginequation
-V_1+V_2-V_o=0
endequation
beginequation
V_o = V_2-V_1
endequation
By selecting appropriate resistance for the compensation resistor, the output voltage can be made zero. We know that,
beginequation
V_1 = I_B^+ R_comp
endequation
beginequation
I_B^+ = fracV_1R_comp
endequation
Since, non-inverting terminal is at $-V_1$ voltage, the node $a$ is also at the same voltage with the same polarity since they have no potential difference between them.
Thus,
beginequation
I_1 = fracV_1R_1
endequation
beginequation
I_2 = fracV_2R_f
endequation
For compensation as said earlier, the output voltage must be zero since there is no input given. That is, $V_2=V_1$
Thus,
beginequation
I_2=fracV_1R_f
endequation
KCL at node $a$ gives,
beginequation
I_B^-=I_1+I_2=fracV_1R_1+fracV_1R_f
endequation
Assuming $I_B^-=I_B^+$
beginequation
fracV_1R_comp = fracV_1R_1+fracV_1R_f
endequation
Thus,
beginequation
R_comp = fracR_1R_fR_1+R_f = R_1||R_f
endequation
answered Jan 2 at 17:56
RAMASUBRAMANIYAN GRAMASUBRAMANIYAN G
415
$endgroup$
add a comment |
$begingroup$
simulate this circuit – Schematic created using CircuitLab
Let the input bias currents for the inverting and the non-inverting terminals of the op-amp be $I_B^-$ and $I_B^+$ respectively. Thus, the input bias current to the op-amp is their average. That is,
beginequation
I_B = fracI_B^- +I_B^+2
endequation
The input voltage when set to zero that is $ V_i = 0 $, then the the output voltage will be
beginequation
V_o = I_B^- R_f
endequation
Due the flow of the current $I_B^+$ the compensation resistor $R_comp$ has a voltage drop of $ V_1$. The difference of voltage between the node $a$ and the non-inverting terminal of the op-amp is zero as mentioned in the schematic.
Applying Kirchoff's voltage law,
beginequation
-V_1+V_2-V_o=0
endequation
beginequation
V_o = V_2-V_1
endequation
By selecting appropriate resistance for the compensation resistor, the output voltage can be made zero. We know that,
beginequation
V_1 = I_B^+ R_comp
endequation
beginequation
I_B^+ = fracV_1R_comp
endequation
Since, non-inverting terminal is at $-V_1$ voltage, the node $a$ is also at the same voltage with the same polarity since they have no potential difference between them.
Thus,
beginequation
I_1 = fracV_1R_1
endequation
beginequation
I_2 = fracV_2R_f
endequation
For compensation as said earlier, the output voltage must be zero since there is no input given. That is, $V_2=V_1$
Thus,
beginequation
I_2=fracV_1R_f
endequation
KCL at node $a$ gives,
beginequation
I_B^-=I_1+I_2=fracV_1R_1+fracV_1R_f
endequation
Assuming $I_B^-=I_B^+$
beginequation
fracV_1R_comp = fracV_1R_1+fracV_1R_f
endequation
Thus,
beginequation
R_comp = fracR_1R_fR_1+R_f = R_1||R_f
endequation
answered Jan 2 at 17:56
RAMASUBRAMANIYAN GRAMASUBRAMANIYAN G
415
$endgroup$
add a comment |
$begingroup$
simulate this circuit – Schematic created using CircuitLab
Let the input bias currents for the inverting and the non-inverting terminals of the op-amp be $I_B^-$ and $I_B^+$ respectively. Thus, the input bias current to the op-amp is their average. That is,
beginequation
I_B = fracI_B^- +I_B^+2
endequation
The input voltage when set to zero that is $ V_i = 0 $, then the the output voltage will be
beginequation
V_o = I_B^- R_f
endequation
Due the flow of the current $I_B^+$ the compensation resistor $R_comp$ has a voltage drop of $ V_1$. The difference of voltage between the node $a$ and the non-inverting terminal of the op-amp is zero as mentioned in the schematic.
Applying Kirchoff's voltage law,
beginequation
-V_1+V_2-V_o=0
endequation
beginequation
V_o = V_2-V_1
endequation
By selecting appropriate resistance for the compensation resistor, the output voltage can be made zero. We know that,
beginequation
V_1 = I_B^+ R_comp
endequation
beginequation
I_B^+ = fracV_1R_comp
endequation
Since, non-inverting terminal is at $-V_1$ voltage, the node $a$ is also at the same voltage with the same polarity since they have no potential difference between them.
Thus,
beginequation
I_1 = fracV_1R_1
endequation
beginequation
I_2 = fracV_2R_f
endequation
For compensation as said earlier, the output voltage must be zero since there is no input given. That is, $V_2=V_1$
Thus,
beginequation
I_2=fracV_1R_f
endequation
KCL at node $a$ gives,
beginequation
I_B^-=I_1+I_2=fracV_1R_1+fracV_1R_f
endequation
Assuming $I_B^-=I_B^+$
beginequation
fracV_1R_comp = fracV_1R_1+fracV_1R_f
endequation
Thus,
beginequation
R_comp = fracR_1R_fR_1+R_f = R_1||R_f
endequation
answered Jan 2 at 17:56
RAMASUBRAMANIYAN GRAMASUBRAMANIYAN G
415
$endgroup$
simulate this circuit – Schematic created using CircuitLab
Let the input bias currents for the inverting and the non-inverting terminals of the op-amp be $I_B^-$ and $I_B^+$ respectively. Thus, the input bias current to the op-amp is their average. That is,
beginequation
I_B = fracI_B^- +I_B^+2
endequation
The input voltage when set to zero that is $ V_i = 0 $, then the the output voltage will be
beginequation
V_o = I_B^- R_f
endequation
Due the flow of the current $I_B^+$ the compensation resistor $R_comp$ has a voltage drop of $ V_1$. The difference of voltage between the node $a$ and the non-inverting terminal of the op-amp is zero as mentioned in the schematic.
Applying Kirchoff's voltage law,
beginequation
-V_1+V_2-V_o=0
endequation
beginequation
V_o = V_2-V_1
endequation
By selecting appropriate resistance for the compensation resistor, the output voltage can be made zero. We know that,
beginequation
V_1 = I_B^+ R_comp
endequation
beginequation
I_B^+ = fracV_1R_comp
endequation
Since, non-inverting terminal is at $-V_1$ voltage, the node $a$ is also at the same voltage with the same polarity since they have no potential difference between them.
Thus,
beginequation
I_1 = fracV_1R_1
endequation
beginequation
I_2 = fracV_2R_f
endequation
For compensation as said earlier, the output voltage must be zero since there is no input given. That is, $V_2=V_1$
Thus,
beginequation
I_2=fracV_1R_f
endequation
KCL at node $a$ gives,
beginequation
I_B^-=I_1+I_2=fracV_1R_1+fracV_1R_f
endequation
Assuming $I_B^-=I_B^+$
beginequation
fracV_1R_comp = fracV_1R_1+fracV_1R_f
endequation
Thus,
beginequation
R_comp = fracR_1R_fR_1+R_f = R_1||R_f
endequation
answered Jan 2 at 17:56
RAMASUBRAMANIYAN GRAMASUBRAMANIYAN G
415
edited Jan 2 at 18:27
answered Jan 2 at 17:56
RAMASUBRAMANIYAN GRAMASUBRAMANIYAN G
415
answered Jan 2 at 17:56
RAMASUBRAMANIYAN GRAMASUBRAMANIYAN G
415
answered Jan 2 at 17:56
RAMASUBRAMANIYAN GRAMASUBRAMANIYAN G
415
415
add a comment |
add a comment |
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$begingroup$
The result is 100k//1M No it is not unless there is a voltage source to ground connected at the left of the 100k resistor. As drawn there is "nothing" so the 100 k resistor does nothing. How does an opamp's output behave? Does it have a low or high output impedance? You should first think about how this circuit normally operates, what will be connected to it, how is it used?
$endgroup$
– Bimpelrekkie
Jan 2 at 14:30
2
$begingroup$
@Bimpelrekkie: In such circuits, it is generally understood that unknown inputs are voltage sources, unless otherwise specified.
$endgroup$
– Dave Tweed♦
Jan 2 at 14:31
3
$begingroup$
@DaveTweed Sure, but I think that is a very bad habit! Nothing is specified at the input here. How much trouble is it to put a "Vin" there and then it would be clear. Very often I see assumptions being made and assumptions are the source of many errors and misunderstandings.
$endgroup$
– Bimpelrekkie
Jan 2 at 14:32
3
$begingroup$
@Bimpelrekkie - I'm sure you are too polite to say it, but there is an old saying which goes, "When you 'assume', you make an 'ass' out of 'u' and 'me',"
$endgroup$
– WhatRoughBeast
Jan 2 at 15:50
$begingroup$
The answer must assume that the Thévenin resistance and voltage at Vin- includes the source resistance, Rs.
$endgroup$
– Sunnyskyguy EE75
Jan 2 at 18:36