mjhjmtu

Here are the flags from /proc/cpuinfo:

fpu vme de pse tsc msr pae mce cx8 apic sep mtrr pge mca cmov pat pse36
clflush dts acpi mmx fxsr sse sse2 ss ht tm pbe syscall nx rdtscp lm
constant_tsc arch_perfmon pebs bts nopl xtopology nonstop_tsc aperfmperf
pni pclmulqdq dtes64 monitor ds_cpl vmx est tm2 ssse3 cx16 xtpr pdcm pcid
sse4_1 sse4_2 x2apic popcnt tsc_deadline_timer aes xsave avx lahf_lm ida
arat epb xsaveopt pln pts dts tpr_shadow vnmi flexpriority ept vpid

I clearly have a pclmulqdq flag, but I'm not sure if it means PCLMUL instruction set support. How can I find what the flag means, or what flag PCLMUL corresponds to?

From the information available at Wikipedia and Intel, I'd assume that yes.

From the Wikipedia entry:

PCLMULQDQ Performs a carry-less multiplication of two 64-bit integers 

which matches the flag you have.

In the Intel 64 IA-32 Instruction Set Reference no listing is given for a PCLMUL instruction. However, Intel does list a PCLMULQDQ instruction described as follows:

Description

Performs a carry-less multiplication of two quadwords, selected from
the first source and second source operand according to the value of
the immediate byte. Bits 4 and 0 are used to select which 64-bit half
of each operand to use according to Table 4-13, other bits of the
immediate byte are ignored (Intel 64 IA-32 Instruction Set Reference, Volume II).

So, when you see PCLMUL support assume it's just a shortened form of PCLMULQDQ. Instead of using two 64 bit registers to store the result of multiplying two 64 bit registers, the result is stored in one 128 bit register. Hence, the name carry-less multiplication. Other instructions would use two different registers to store the result and the assembly programmer would have to perform extra steps to figure out the final result for use in his program. But with carry-less multiplication, the result is store in one larger register. In this instruction (PCLMULQDQ), the result of two 64-bit numbers multiplied is stored in one 128 bit register. The Instruction uses the 128-bit XMM registers with CPUs that have such registers to use.