Why is the RESET pin set up like this in this Z80 schematic?
Clash Royale CLAN TAG#URR8PPP
$begingroup$
I've found the following schematic:
Which after a lot of datasheet reading I mostly understand.
The main thing I don't understand, however, is what's going on with the RESET pin. First of all, I understand that the RESET pin is active-low. In this case, why is it pulled high to +5V? Surely I wouldn't want the CPU to reset. I assume the answer to this part is something to do with resetting on boot.
My main question is why there's a capacitor from RESET to (what seems to be) ground.
Is that even ground? If so, why is there a capacitor before it? If not, what is it, and what does it do?
z80
edited Feb 7 at 13:26
pipe
10.1k42656
asked Feb 6 at 23:44
Jacob GarbyJacob Garby
24910
$endgroup$
add a comment |
$begingroup$
I've found the following schematic:
Which after a lot of datasheet reading I mostly understand.
The main thing I don't understand, however, is what's going on with the RESET pin. First of all, I understand that the RESET pin is active-low. In this case, why is it pulled high to +5V? Surely I wouldn't want the CPU to reset. I assume the answer to this part is something to do with resetting on boot.
My main question is why there's a capacitor from RESET to (what seems to be) ground.
Is that even ground? If so, why is there a capacitor before it? If not, what is it, and what does it do?
z80
edited Feb 7 at 13:26
pipe
10.1k42656
asked Feb 6 at 23:44
Jacob GarbyJacob Garby
24910
$endgroup$
2
$begingroup$
It's sort of a half-a** reset circuit used when you don't really care much if the processor gets reset or not. But with a clean power up after a relatively long power-off it should usually work.
$endgroup$
– Spehro Pefhany
Feb 7 at 14:35
$begingroup$
And that is way we used to tell people to unplug a computer leave it unplugged for 3 minutes before plugging it back in, if we needed a reset.
$endgroup$
– Ian Ringrose
Feb 7 at 16:37
add a comment |
$begingroup$
I've found the following schematic:
Which after a lot of datasheet reading I mostly understand.
The main thing I don't understand, however, is what's going on with the RESET pin. First of all, I understand that the RESET pin is active-low. In this case, why is it pulled high to +5V? Surely I wouldn't want the CPU to reset. I assume the answer to this part is something to do with resetting on boot.
My main question is why there's a capacitor from RESET to (what seems to be) ground.
Is that even ground? If so, why is there a capacitor before it? If not, what is it, and what does it do?
z80
edited Feb 7 at 13:26
pipe
10.1k42656
asked Feb 6 at 23:44
Jacob GarbyJacob Garby
24910
$endgroup$
I've found the following schematic:
Which after a lot of datasheet reading I mostly understand.
The main thing I don't understand, however, is what's going on with the RESET pin. First of all, I understand that the RESET pin is active-low. In this case, why is it pulled high to +5V? Surely I wouldn't want the CPU to reset. I assume the answer to this part is something to do with resetting on boot.
My main question is why there's a capacitor from RESET to (what seems to be) ground.
Is that even ground? If so, why is there a capacitor before it? If not, what is it, and what does it do?
z80
z80
edited Feb 7 at 13:26
pipe
10.1k42656
asked Feb 6 at 23:44
Jacob GarbyJacob Garby
24910
edited Feb 7 at 13:26
pipe
10.1k42656
asked Feb 6 at 23:44
Jacob GarbyJacob Garby
24910
edited Feb 7 at 13:26
pipe
10.1k42656
edited Feb 7 at 13:26
pipe
10.1k42656
edited Feb 7 at 13:26
pipe
10.1k42656
10.1k42656
asked Feb 6 at 23:44
Jacob GarbyJacob Garby
24910
asked Feb 6 at 23:44
Jacob GarbyJacob Garby
24910
asked Feb 6 at 23:44
Jacob GarbyJacob Garby
24910
24910
2
$begingroup$
It's sort of a half-a** reset circuit used when you don't really care much if the processor gets reset or not. But with a clean power up after a relatively long power-off it should usually work.
$endgroup$
– Spehro Pefhany
Feb 7 at 14:35
$begingroup$
And that is way we used to tell people to unplug a computer leave it unplugged for 3 minutes before plugging it back in, if we needed a reset.
$endgroup$
– Ian Ringrose
Feb 7 at 16:37
add a comment |
2
$begingroup$
It's sort of a half-a** reset circuit used when you don't really care much if the processor gets reset or not. But with a clean power up after a relatively long power-off it should usually work.
$endgroup$
– Spehro Pefhany
Feb 7 at 14:35
$begingroup$
And that is way we used to tell people to unplug a computer leave it unplugged for 3 minutes before plugging it back in, if we needed a reset.
$endgroup$
– Ian Ringrose
Feb 7 at 16:37
2
2
$begingroup$
It's sort of a half-a** reset circuit used when you don't really care much if the processor gets reset or not. But with a clean power up after a relatively long power-off it should usually work.
$endgroup$
– Spehro Pefhany
Feb 7 at 14:35
$begingroup$
It's sort of a half-a** reset circuit used when you don't really care much if the processor gets reset or not. But with a clean power up after a relatively long power-off it should usually work.
$endgroup$
– Spehro Pefhany
Feb 7 at 14:35
$begingroup$
And that is way we used to tell people to unplug a computer leave it unplugged for 3 minutes before plugging it back in, if we needed a reset.
$endgroup$
– Ian Ringrose
Feb 7 at 16:37
$begingroup$
And that is way we used to tell people to unplug a computer leave it unplugged for 3 minutes before plugging it back in, if we needed a reset.
$endgroup$
– Ian Ringrose
Feb 7 at 16:37
add a comment |
2 Answers
2
active
oldest
votes
$begingroup$
The Reset pin is Active low, so has to be pulled low to reset the processor.
The capacitor connected to the reset pin is also connected to Gnd (the schematic uses a wrong symbol), and along with the pullup resistor forms an RC network that holds the processor in reset for a time after VCC first rises.
You will often see Reset circuits such as this:
simulate this circuit – Schematic created using CircuitLab
The RC values are defined to hold the processor in reset long enough to let the supply stabilize. It can also provide a physical reset button to reset/restart the processor.
answered Feb 6 at 23:54
Jack CreaseyJack Creasey
14.6k2823
$endgroup$
5
$begingroup$
Often there is also a diode in parallel with R1, to discharge C1 when VCC is removed.
$endgroup$
– Technophile
Feb 7 at 3:13
1
$begingroup$
@Technophile Quite right ...I added it to the schematic
$endgroup$
– Jack Creasey
Feb 7 at 4:11
1
$begingroup$
Also, for proper operation this requires that the input be a Schmitt trigger, in order to allow reliable operation.
$endgroup$
– WhatRoughBeast
Feb 7 at 4:32
$begingroup$
@WhatRoughBeast Some circuits did use a Schmidt trigger some didn't. Many circuits didn't even have C1. The *Reset input was the same as the *NMI and *INT pins and was level sensitive, so as VCC rose it eventually released the *Reset. But I do agree the better schematics did do it that way.
$endgroup$
– Jack Creasey
Feb 7 at 5:41
$begingroup$
That makes perfect sense! Thank you!
$endgroup$
– Jacob Garby
Feb 7 at 20:57
add a comment |
$begingroup$
As you have correctly stated, RESET is active low.
On power up C is discharged, the reset is held low which forces the chip to hold off initialising while the power stabilises.
After a time roughly equal to R x C (s) the capacitor voltage has charged up through R enough to release the RESET and allow the controller to run. By this time the power should be stable.
answered Feb 7 at 0:00
TransistorTransistor
85.7k784184
$endgroup$
add a comment |
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2 Answers
2
active
oldest
votes
2 Answers
2
active
oldest
votes
active
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votes
active
oldest
votes
$begingroup$
The Reset pin is Active low, so has to be pulled low to reset the processor.
The capacitor connected to the reset pin is also connected to Gnd (the schematic uses a wrong symbol), and along with the pullup resistor forms an RC network that holds the processor in reset for a time after VCC first rises.
You will often see Reset circuits such as this:
simulate this circuit – Schematic created using CircuitLab
The RC values are defined to hold the processor in reset long enough to let the supply stabilize. It can also provide a physical reset button to reset/restart the processor.
answered Feb 6 at 23:54
Jack CreaseyJack Creasey
14.6k2823
$endgroup$
5
$begingroup$
Often there is also a diode in parallel with R1, to discharge C1 when VCC is removed.
$endgroup$
– Technophile
Feb 7 at 3:13
1
$begingroup$
@Technophile Quite right ...I added it to the schematic
$endgroup$
– Jack Creasey
Feb 7 at 4:11
1
$begingroup$
Also, for proper operation this requires that the input be a Schmitt trigger, in order to allow reliable operation.
$endgroup$
– WhatRoughBeast
Feb 7 at 4:32
$begingroup$
@WhatRoughBeast Some circuits did use a Schmidt trigger some didn't. Many circuits didn't even have C1. The *Reset input was the same as the *NMI and *INT pins and was level sensitive, so as VCC rose it eventually released the *Reset. But I do agree the better schematics did do it that way.
$endgroup$
– Jack Creasey
Feb 7 at 5:41
$begingroup$
That makes perfect sense! Thank you!
$endgroup$
– Jacob Garby
Feb 7 at 20:57
add a comment |
$begingroup$
The Reset pin is Active low, so has to be pulled low to reset the processor.
The capacitor connected to the reset pin is also connected to Gnd (the schematic uses a wrong symbol), and along with the pullup resistor forms an RC network that holds the processor in reset for a time after VCC first rises.
You will often see Reset circuits such as this:
simulate this circuit – Schematic created using CircuitLab
The RC values are defined to hold the processor in reset long enough to let the supply stabilize. It can also provide a physical reset button to reset/restart the processor.
answered Feb 6 at 23:54
Jack CreaseyJack Creasey
14.6k2823
$endgroup$
5
$begingroup$
Often there is also a diode in parallel with R1, to discharge C1 when VCC is removed.
$endgroup$
– Technophile
Feb 7 at 3:13
1
$begingroup$
@Technophile Quite right ...I added it to the schematic
$endgroup$
– Jack Creasey
Feb 7 at 4:11
1
$begingroup$
Also, for proper operation this requires that the input be a Schmitt trigger, in order to allow reliable operation.
$endgroup$
– WhatRoughBeast
Feb 7 at 4:32
$begingroup$
@WhatRoughBeast Some circuits did use a Schmidt trigger some didn't. Many circuits didn't even have C1. The *Reset input was the same as the *NMI and *INT pins and was level sensitive, so as VCC rose it eventually released the *Reset. But I do agree the better schematics did do it that way.
$endgroup$
– Jack Creasey
Feb 7 at 5:41
$begingroup$
That makes perfect sense! Thank you!
$endgroup$
– Jacob Garby
Feb 7 at 20:57
add a comment |
$begingroup$
The Reset pin is Active low, so has to be pulled low to reset the processor.
The capacitor connected to the reset pin is also connected to Gnd (the schematic uses a wrong symbol), and along with the pullup resistor forms an RC network that holds the processor in reset for a time after VCC first rises.
You will often see Reset circuits such as this:
simulate this circuit – Schematic created using CircuitLab
The RC values are defined to hold the processor in reset long enough to let the supply stabilize. It can also provide a physical reset button to reset/restart the processor.
answered Feb 6 at 23:54
Jack CreaseyJack Creasey
14.6k2823
$endgroup$
The Reset pin is Active low, so has to be pulled low to reset the processor.
The capacitor connected to the reset pin is also connected to Gnd (the schematic uses a wrong symbol), and along with the pullup resistor forms an RC network that holds the processor in reset for a time after VCC first rises.
You will often see Reset circuits such as this:
simulate this circuit – Schematic created using CircuitLab
The RC values are defined to hold the processor in reset long enough to let the supply stabilize. It can also provide a physical reset button to reset/restart the processor.
answered Feb 6 at 23:54
Jack CreaseyJack Creasey
14.6k2823
edited Feb 7 at 4:10
answered Feb 6 at 23:54
Jack CreaseyJack Creasey
14.6k2823
answered Feb 6 at 23:54
Jack CreaseyJack Creasey
14.6k2823
answered Feb 6 at 23:54
Jack CreaseyJack Creasey
14.6k2823
14.6k2823
5
$begingroup$
Often there is also a diode in parallel with R1, to discharge C1 when VCC is removed.
$endgroup$
– Technophile
Feb 7 at 3:13
1
$begingroup$
@Technophile Quite right ...I added it to the schematic
$endgroup$
– Jack Creasey
Feb 7 at 4:11
1
$begingroup$
Also, for proper operation this requires that the input be a Schmitt trigger, in order to allow reliable operation.
$endgroup$
– WhatRoughBeast
Feb 7 at 4:32
$begingroup$
@WhatRoughBeast Some circuits did use a Schmidt trigger some didn't. Many circuits didn't even have C1. The *Reset input was the same as the *NMI and *INT pins and was level sensitive, so as VCC rose it eventually released the *Reset. But I do agree the better schematics did do it that way.
$endgroup$
– Jack Creasey
Feb 7 at 5:41
$begingroup$
That makes perfect sense! Thank you!
$endgroup$
– Jacob Garby
Feb 7 at 20:57
add a comment |
5
$begingroup$
Often there is also a diode in parallel with R1, to discharge C1 when VCC is removed.
$endgroup$
– Technophile
Feb 7 at 3:13
1
$begingroup$
@Technophile Quite right ...I added it to the schematic
$endgroup$
– Jack Creasey
Feb 7 at 4:11
1
$begingroup$
Also, for proper operation this requires that the input be a Schmitt trigger, in order to allow reliable operation.
$endgroup$
– WhatRoughBeast
Feb 7 at 4:32
$begingroup$
@WhatRoughBeast Some circuits did use a Schmidt trigger some didn't. Many circuits didn't even have C1. The *Reset input was the same as the *NMI and *INT pins and was level sensitive, so as VCC rose it eventually released the *Reset. But I do agree the better schematics did do it that way.
$endgroup$
– Jack Creasey
Feb 7 at 5:41
$begingroup$
That makes perfect sense! Thank you!
$endgroup$
– Jacob Garby
Feb 7 at 20:57
5
5
$begingroup$
Often there is also a diode in parallel with R1, to discharge C1 when VCC is removed.
$endgroup$
– Technophile
Feb 7 at 3:13
$begingroup$
Often there is also a diode in parallel with R1, to discharge C1 when VCC is removed.
$endgroup$
– Technophile
Feb 7 at 3:13
1
1
$begingroup$
@Technophile Quite right ...I added it to the schematic
$endgroup$
– Jack Creasey
Feb 7 at 4:11
$begingroup$
@Technophile Quite right ...I added it to the schematic
$endgroup$
– Jack Creasey
Feb 7 at 4:11
1
1
$begingroup$
Also, for proper operation this requires that the input be a Schmitt trigger, in order to allow reliable operation.
$endgroup$
– WhatRoughBeast
Feb 7 at 4:32
$begingroup$
Also, for proper operation this requires that the input be a Schmitt trigger, in order to allow reliable operation.
$endgroup$
– WhatRoughBeast
Feb 7 at 4:32
$begingroup$
@WhatRoughBeast Some circuits did use a Schmidt trigger some didn't. Many circuits didn't even have C1. The *Reset input was the same as the *NMI and *INT pins and was level sensitive, so as VCC rose it eventually released the *Reset. But I do agree the better schematics did do it that way.
$endgroup$
– Jack Creasey
Feb 7 at 5:41
$begingroup$
@WhatRoughBeast Some circuits did use a Schmidt trigger some didn't. Many circuits didn't even have C1. The *Reset input was the same as the *NMI and *INT pins and was level sensitive, so as VCC rose it eventually released the *Reset. But I do agree the better schematics did do it that way.
$endgroup$
– Jack Creasey
Feb 7 at 5:41
$begingroup$
That makes perfect sense! Thank you!
$endgroup$
– Jacob Garby
Feb 7 at 20:57
$begingroup$
That makes perfect sense! Thank you!
$endgroup$
– Jacob Garby
Feb 7 at 20:57
add a comment |
$begingroup$
As you have correctly stated, RESET is active low.
On power up C is discharged, the reset is held low which forces the chip to hold off initialising while the power stabilises.
After a time roughly equal to R x C (s) the capacitor voltage has charged up through R enough to release the RESET and allow the controller to run. By this time the power should be stable.
answered Feb 7 at 0:00
TransistorTransistor
85.7k784184
$endgroup$
add a comment |
$begingroup$
As you have correctly stated, RESET is active low.
On power up C is discharged, the reset is held low which forces the chip to hold off initialising while the power stabilises.
After a time roughly equal to R x C (s) the capacitor voltage has charged up through R enough to release the RESET and allow the controller to run. By this time the power should be stable.
answered Feb 7 at 0:00
TransistorTransistor
85.7k784184
$endgroup$
add a comment |
$begingroup$
As you have correctly stated, RESET is active low.
On power up C is discharged, the reset is held low which forces the chip to hold off initialising while the power stabilises.
After a time roughly equal to R x C (s) the capacitor voltage has charged up through R enough to release the RESET and allow the controller to run. By this time the power should be stable.
answered Feb 7 at 0:00
TransistorTransistor
85.7k784184
$endgroup$
As you have correctly stated, RESET is active low.
On power up C is discharged, the reset is held low which forces the chip to hold off initialising while the power stabilises.
After a time roughly equal to R x C (s) the capacitor voltage has charged up through R enough to release the RESET and allow the controller to run. By this time the power should be stable.
answered Feb 7 at 0:00
TransistorTransistor
85.7k784184
answered Feb 7 at 0:00
TransistorTransistor
85.7k784184
answered Feb 7 at 0:00
TransistorTransistor
85.7k784184
answered Feb 7 at 0:00
TransistorTransistor
85.7k784184
85.7k784184
add a comment |
add a comment |
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$begingroup$
It's sort of a half-a** reset circuit used when you don't really care much if the processor gets reset or not. But with a clean power up after a relatively long power-off it should usually work.
$endgroup$
– Spehro Pefhany
Feb 7 at 14:35
$begingroup$
And that is way we used to tell people to unplug a computer leave it unplugged for 3 minutes before plugging it back in, if we needed a reset.
$endgroup$
– Ian Ringrose
Feb 7 at 16:37