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I have sensors (pyranometers that consist of thermopiles and measure sun irradiation) that ouput a low voltage signal so I need to amplify them using an instrumentation amplifier.
I have chosen the AD8237 for this task: Datasheet

Im using a gain of 100 to amplify the initial low voltage signal (ranging 0-20mV) to 0-2V range.

Im then feeding the amplified signal to the ADC (MCP3422): Datasheet

My sensor values change very slowly and I will read out the digitized ADC values only once every second, so speed is not important in my case.

Now as pointed out in the accepted answer in this question I need a filter between the IN-Amp and the ADC to filter the noise.
In many ADC-datasheets a simple passive RC-filter is suggested between the INA and ADC.
I did quite some research and I still have some questions that confuse me and I hope you can help me with:

I figured that a first order RC filter does not meet my requirements so I cascaded multiple RC stages:

^{simulate this circuit – Schematic created using CircuitLab}

And this is the simulated filter response in LTSpice:

Questions:

Can I do that? What would be the disadvantages using the proposed filter?
Capacitor values like 47µF or even 100µF give me a even better response (stronger attenuation), would that have a negative impact on my signal or the ADC?

I guess resistor values should not be further increased to prevent voltage drop on my signal?

The filter response seems very promising: Signals at 10Hz already attenuated by ~50% and at 25Hz already by ~90%. As I only care about the DC signal I guess that response should be fine (also 50-60Hz range is covered strongly by the filter).

Resistors create voltage drops so how would these three cascaded resistors affect my amplified signal (thus my digitized value calculated by the ADC)? Ohms law should apply, but I do not know the current...
Any clarification on this is highly appreciated.

Regarding speed/time constants: As my data acquisition (readout ADC once per second) and change in sensor value is very slow I do not need to keep an eye on the speed/time constant of this filter?

As many datasheets suggest an RC filter stage this approach should not be too far off?

If you are reading the ADC just once per second then you need to eliminate frequencies above 0.5 Hz to prevent aliasing. If you think your system will have noise at, say 10 Hz, then that noise will contaminate your readings. I recommend that you sample at a much higher rate, perhaps some multiple of the power mains frequency, and perform low-pass filtering in software. Even a simple moving-average filter would work and wouldn't take much processing.

ADC inputs typically are quite high impedance. I have often used 100K in series with an input with no dc loss. (and a capacitor to ground for filtering) If you are happy with the attenuation with that circuit then I would suggest scaling the resistors up and the capacitors down. I would not use electrolytic capacitors as they tend to have more leakage compared to other types. I would probably use a ceramic cap.

Edit:

I just looked at the data sheet for the part. Go take a look at page 3, Input Impedance. Loading certainly will not be an issue.

This 3-section RC should provide better rolloff at high frequencies. The random noise is dominated by that 3,000,000 ohm resistor with the 5Hz bandwidth, less than 1uV RMS.

^{simulate this circuit – Schematic created using CircuitLab}

Here is what Signal Chain Explorer (we used that to predict Gargoyles interferer levels)
shows as the 3-pole rolloff. With 2 volts PP input, the ENOB is 19.7

Notice we are NOT including ANY ADC noise contributions.

Your filter will effectively short out the amp if the signal has any significant AC component (even around mains frequency and first/second harmonic). Check out the datasheet: your amp has 4 mA short current and response characteristics are measured with loads of 10-100 kOhm. The equivalent resistance of your filter must be at least that big.

The ADC input will look like a SHORT, for 5 or 10 nanoSeconds, at beginning of the Sample time. That "short" will disrupt any opamp directly connected to the ADC Vin or the ADC VREF.

To prevent this "disruption" (which shows up as ringing, and perhaps input-voltage-dependent quantization errors, we can place LARGE capacitors on the Vin and the VREF pins.

Assume the ADC has 10pF capacitors on its Vin and VREF pins, and assume these capacitors have had their charge consumed during the just-prior ADC operation.

As the ADC once again grabs some charge, there will be surge currents demanded from the external voltage sources(Vin and/or VREF).

To minimize the voltage upset, use LARGE external capacitors: 100X or 1,000X or 10,000X larger than the ADC sample (10pF) capacitors.

In the 3-cascaded_RC filter I gave you, that final capacitor is 10nF (10,000 pF) and should work well.

Again, if the AVERAGE input current is 9nanoAmps (Vin of 3 volts, Cap is 3pF, Fsample being 1,000 per second), flowing thru 3,000,000 ohms, there will be an error of 27 microvolts. This will show up as a linear gain error.