Instructions per second
Instructions per second (IPS) is a measure of a computer's processor speed. For
CISC computers different instructions take different amounts of time, so the value measured depends on the instruction mix; even for comparing processors in the same family the IPS measurement can be problematic. Many reported IPS values have represented "peak" execution rates on artificial instruction sequences with few branches and no cache contention, whereas realistic workloads typically lead to significantly lower IPS values. Memory hierarchy also greatly affects processor performance, an issue barely considered in IPS calculations. Because of these problems, synthetic benchmarks such as Dhrystone are now generally used to estimate computer performance in commonly used applications, and raw IPS has fallen into disuse.
The term is commonly used in association with a numeric value such as thousand/kilo instructions per second (TIPS/KIPS), million instructions per second (MIPS), and billion instructions per second (GIPS).
Contents
1 Computing
1.1 Instructions per cycle
2 Thousand instructions per second (TIPS/KIPS)
3 Millions of instructions per second (MIPS)
4 Timeline of instructions per second
5 See also
6 References
Computing
IPS can be calculated using this equation:[1]
- IPS=sockets×coressocket×clock×Iscycledisplaystyle textIPS=textsocketstimes frac textcorestextsockettimes textclocktimes frac textIstextcycle
However, the instructions/cycle measurement depends on the instruction sequence, the data and external factors.
Instructions per cycle
See "Instructions per cycle" (IPC for various processors).
Thousand instructions per second (TIPS/KIPS)
Before standard benchmarks were available, average speed rating of computers was based on calculations for a mix of instructions with the results given in kilo Instructions Per Second (kIPS). The most famous was the Gibson Mix,[2] produced by Jack Clark Gibson of IBM for scientific applications. Other ratings, such as the ADP mix which does not include floating point operations, were produced for commercial applications. The thousand instructions per second (kIPS) unit is rarely used today, as most current microprocessors can execute at least a million instructions per second.
Millions of instructions per second (MIPS)
The speed of a given CPU depends on many factors, such as the type of instructions being executed, the execution order and the presence of branch instructions (problematic in CPU pipelines). CPU instruction rates are different from clock frequencies, usually reported in Hz, as each instruction may require several clock cycles to complete or the processor may be capable of executing multiple independent instructions simultaneously. MIPS can be useful when comparing performance between processors made with similar architecture (e.g. Microchip branded microcontrollers), but they are difficult to compare between differing CPU architectures.[3] This led to the term "Meaningless Indices of Performance" being popular amongst technical people by the mid-1980s.[4]
For this reason, MIPS has become not a measure of instruction execution speed, but task performance speed compared to a reference. In the late 1970s, minicomputer performance was compared using VAX MIPS, where computers were measured on a task and their performance rated against the VAX 11/780 that was marketed as a 1 MIPS machine. (The measure was also known as the VAX Unit of Performance or VUP.) This was chosen because the 11/780 was roughly equivalent in performance to an IBM System/370 model 158-3, which was commonly accepted in the computing industry as running at 1 MIPS.
Many minicomputer performance claims were based on the Fortran version of the Whetstone benchmark, giving Millions of Whetstone Instructions Per Second (MWIPS). The VAX 11/780 with FPA (1977) runs at 1.02 MWIPS.
Effective MIPS speeds are highly dependent on the programming language used. The Whetstone Report has a table showing MWIPS speeds of PCs via early interpreters and compilers up to modern languages. The first PC compiler was for BASIC (1982) when a 4.8 MHz 8088/87 CPU obtained 0.01 MWIPS. Results on a 2.4 GHz Intel Core 2 Duo (1 CPU 2007) vary from 9.7 MWIPS using BASIC Interpreter, 59 MWIPS via BASIC Compiler, 347 MWIPS using 1987 Fortran, 1,534 MWIPS through HTML/Java to 2,403 MWIPS using a modern C/C++ compiler.
For the most early 8-bit and 16-bit microprocessors, performance was measured in thousand instructions per second (1000 KIPS = 1 MIPS).
zMIPS refers to the MIPS measure used internally by IBM to rate its mainframe servers (zSeries, IBM System z9, and IBM System z10).
Weighted million operations per second (WMOPS) is a similar measurement, used for audio codecs.
Timeline of instructions per second
Processor / System | Dhrystone MIPS or MIPS, and frequency | Instructions per clock cycle (IPS / clock cycles per second) | Instructions per clock cycle per core (IPS / clock cycles per second / cores) | Year | Source |
---|---|---|---|---|---|
UNIVAC I | 0.002 MIPS at 2.25 MHz | 0.0008 | 0.0008 | 1951 | [5] |
IBM 7030 ("Stretch") | 1.200 MIPS at 3.30 MHz | 0.364 | 0.364 | 1961 | [6][7] |
CDC 6600 | 10.00 MIPS at 10.00 MHz | 1 | 1 | 1965 | [8][9] |
Intel 4004 | 0.092 MIPS at 0.740 MHz (Not Dhrystone) | 0.124 | 0.124 | 1971 | [10] |
IBM System/370 Model 158 | 0.640 MIPS at 8.696 MHz | 0.0736 | 0.0736 | 1972 | [11] |
Intel 8080 | 0.290 MIPS at 2.000 MHz | 0.145 | 0.145 | 1974 | [12] |
Cray 1 | 160.0 MIPS at 80.00 MHz | 2 | 2 | 1975 | [13] |
MOS Technology 6502 | 0.430 MIPS at 1.000 MHz | 0.43 | 0.43 | 1975 | [14] |
Intel 8080A | 0.435 MIPS at 3.000 MHz | 0.145 | 0.145 | 1976 | [12] |
Zilog Z80 | 0.580 MIPS at 4.000 MHz | 0.145 | 0.145 | 1976 | [14] |
Motorola 6809 | 0.420 MIPS at 1.000 MHz | 0.42 | 0.42 | 1977 | [14] |
Motorola 6802 | 0.500 MIPS at 1.000 MHz | 0.5 | 0.5 | 1977 | [15] |
IBM System/370 Model 158-3 | 0.730 MIPS at 8.696 MHz | 0.0839 | 0.0839 | 1977 | [11] |
VAX-11/780 | 1.000 MIPS at 5.000 MHz | 0.2 | 0.2 | 1977 | [11] |
Intel 8086 | 0.330 MIPS at 5.000 MHz | 0.066 | 0.066 | 1978 | [12] |
Fujitsu MB8843 | 2.000 MIPS at 2.000 MHz (Not Dhrystone) | 1 | 1 | 1978 | [16] |
Intel 8088 | 0.750 MIPS at 10.00 MHz | 0.075 | 0.075 | 1979 | [12] |
Motorola 68000 | 1.400 MIPS at 8.000 MHz | 0.175 | 0.175 | 1979 | [14] |
Zilog Z8001/Z8002 | 1.5 MIPS at 6 MHz | 0.25 | 0.25 | 1979 | [17] |
Intel 8035/8039/8048 | 6 MIPS at 6 MHz (Not Dhrystone) | 1 | 1 | 1980 | [18] |
Fujitsu MB8843/MB8844 | 6 MIPS at 6 MHz (Not Dhrystone) | 1 | 1 | 1980 | [16] |
Zilog Z80/Z80H | 1.16 MIPS at 8 MHz | 0.145 | 0.145 | 1981 | [14][19] |
Motorola 6802 | 1.79 MIPS at 3.58 MHz | 0.5 | 0.5 | 1981 | [15][20] |
Zilog Z8001/Z8002B | 2.5 MIPS at 10 MHz | 0.25 | 0.25 | 1981 | [17] |
MOS Technology 6502 | 2.522 MIPS at 5.865 MHz | 0.43 | 0.43 | 1981 | [14][20] |
Intel 286 | 1.28 MIPS at 12 MHz | 0.107 | 0.107 | 1982 | [11] |
Motorola 68000 | 2.188 MIPS at 12.5 MHz | 0.175 | 0.175 | 1982 | [14] |
Motorola 68010 | 2.407 MIPS at 12.5 MHz | 0.193 | 0.193 | 1982 | [21] |
NEC V20 | 4 MIPS at 8 MHz | 0.5 | 0.5 | 1982 | [22] |
LINKS-1 Computer Graphics System (257-processor) | 642.5 MIPS at 10 MHz | 2.5 | 0.25 | 1982 | [23] |
Texas Instruments TMS32010 | 5 MIPS at 20 MHz | 0.25 | 0.25 | 1983 | [24] |
NEC V30 | 5 MIPS at 10 MHz | 0.5 | 0.5 | 1983 | [22] |
Motorola 68010 | 3.209 MIPS at 16.67 MHz | 0.193 | 0.193 | 1984 | [21] |
Motorola 68020 | 4.848 MIPS at 16 MHz | 0.303 | 0.303 | 1984 | [25] |
Hitachi HD63705 | 2 MIPS at 2 MHz | 1 | 1 | 1985 | [26][27] |
Intel i386DX | 2.15 MIPS at 16 MHz | 0.134 | 0.134 | 1985 | [11] |
Hitachi-Motorola 68HC000 | 3.5 MIPS at 20 MHz | 0.175 | 0.175 | 1985 | [14] |
Intel 8751 | 1 MIPS at 12 MHz | 0.083 | 0.083 | 1985 | [28] |
Sega System 16 (4-processor) | 16.33 MIPS at 10 MHz | 4.083 | 1.020 | 1985 | [29] |
ARM2 | 4 MIPS at 8 MHz | 0.5 | 0.5 | 1986 | [30] |
Texas Instruments TMS34010 | 6 MIPS at 50 MHz | 0.12 | 0.12 | 1986 | [31] |
NEC V70 | 6.6 MIPS at 20 MHz | 0.33 | 0.33 | 1987 | [32] |
Motorola 68030 | 9 MIPS at 25 MHz | 0.36 | 0.36 | 1987 | [33][34] |
Gmicro/200 | 10 MIPS at 20 MHz | 0.5 | 0.5 | 1987 | [35] |
Texas Instruments TMS320C20 | 12.5 MIPS at 25 MHz | 0.5 | 0.5 | 1987 | [36] |
Analog Devices ADSP-2100 | 12.5 MIPS at 12.5 MHz | 1 | 1 | 1987 | [37] |
Texas Instruments TMS320C25 | 25 MIPS at 50 MHz | 0.5 | 0.5 | 1987 | [36] |
Motorola 68020 | 10 MIPS at 33 MHz | 0.303 | 0.303 | 1988 | [25] |
Motorola 68030 | 18 MIPS at 50 MHz | 0.36 | 0.36 | 1988 | [34] |
Namco System 21 (10-processor) | 73.927 MIPS at 25 MHz | 2.957 | 0.296 | 1988 | [38] |
Intel i386DX | 4.3 MIPS at 33 MHz | 0.13 | 0.13 | 1989 | [11] |
Intel i486DX | 8.7 MIPS at 25 MHz | 0.348 | 0.348 | 1989 | [11] |
NEC V80 | 16.5 MIPS at 33 MHz | 0.5 | 0.5 | 1989 | [32] |
Intel i860 | 25 MIPS at 25 MHz | 1 | 1 | 1989 | [39] |
Atari Hard Drivin' (7-processor) | 33.573 MIPS at 50 MHz | 0.671 | 0.0959 | 1989 | [40] |
NEC SX-3 (4-processor) | 680 MIPS at 400 MHz | 1.7 | 0.425 | 1989 | [41] |
ARM3 | 12 MIPS at 25 MHz | 0.5 | 0.5 | 1989 | [42] |
Motorola 68040 | 44 MIPS at 40 MHz | 1.1 | 1.1 | 1990 | [43] |
Namco System 21 (Galaxian³) (96-processor) | 1,660.386 MIPS at 40 MHz | 41.51 | 0.432 | 1990 | [44] |
AMD Am386 | 9 MIPS at 40 MHz | 0.225 | 0.225 | 1991 | [45] |
Intel i486DX | 11.1 MIPS at 33 MHz | 0.336 | 0.336 | 1991 | [11] |
Intel i860 | 50 MIPS at 50 MHz | 1 | 1 | 1991 | [39] |
Intel i486DX2 | 25.6 MIPS at 66 MHz | 0.388 | 0.388 | 1992 | [11] |
Alpha 21064 | 86 MIPS at 150 MHz | 0.573 | 0.573 | 1992 | [11] |
Alpha 21064 | 135 MIPS at 200 MHz | 0.675 | 0.675 | 1993 | [11][46] |
MIPS R4400 | 85 MIPS at 150 MHz | 0.567 | 0.567 | 1993 | [47] |
Gmicro/500 | 132 MIPS at 66 MHz | 2 | 2 | 1993 | [48] |
IBM-Motorola PowerPC 601 | 157.7 MIPS at 80 MHz | 1.971 | 1.971 | 1993 | [49] |
SGI Onyx RealityEngine2 (36-processor) | 2,640 MIPS at 150 MHz | 17.6 | 0.489 | 1993 | [50] |
Namco Magic Edge Hornet Simulator (36-processor) | 2,880 MIPS at 150 MHz | 19.2 | 0.533 | 1993 | [47] |
ARM7 | 40 MIPS at 45 MHz | 0.889 | 0.889 | 1994 | [51] |
Intel DX4 | 70 MIPS at 100 MHz | 0.7 | 0.7 | 1994 | [12] |
Motorola 68060 | 110 MIPS at 75 MHz | 1.33 | 1.33 | 1994 | |
Intel Pentium | 188 MIPS at 100 MHz | 1.88 | 1.88 | 1994 | [52] |
Microchip PIC16F | 5 MIPS at 20 MHz | 0.25 | 0.25 | 1995 | [53] |
IBM-Motorola PowerPC 603e | 188 MIPS at 133 MHz | 1.414 | 1.414 | 1995 | [54] |
ARM 7500FE | 35.9 MIPS at 40 MHz | 0.9 | 0.9 | 1996 | |
IBM-Motorola PowerPC 603ev | 423 MIPS at 300 MHz | 1.41 | 1.41 | 1996 | [54] |
Intel Pentium Pro | 541 MIPS at 200 MHz | 2.7 | 2.7 | 1996 | [55] |
Hitachi SH-4 | 360 MIPS at 200 MHz | 1.8 | 1.8 | 1997 | [56][57] |
IBM-Motorola PowerPC 750 | 525 MIPS at 233 MHz | 2.3 | 2.3 | 1997 | |
Zilog eZ80 | 80 MIPS at 50 MHz | 1.6 | 1.6 | 1999 | [58] |
Intel Pentium III | 2,054 MIPS at 600 MHz | 3.4 | 3.4 | 1999 | [52] |
Sega Naomi Multiboard (32-processor) | 6,400 MIPS at 200 MHz | 32 | 1 | 1999 | [59] |
Freescale MPC8272 | 760 MIPS at 400 MHz | 1.9 | 1.9 | 2000 | [60] |
AMD Athlon | 3,561 MIPS at 1.2 GHz | 3.0 | 3.0 | 2000 | |
Silicon Recognition ZISC 78 | 8,600 MIPS at 33 MHz | 260.6 | 260.6 | 2000 | [61] |
ARM11 | 515 MIPS at 412 MHz | 1.25 | 1.25 | 2002 | [62] |
AMD Athlon XP 2500+ | 7,527 MIPS at 1.83 GHz | 4.1 | 4.1 | 2003 | [52] |
Pentium 4 Extreme Edition | 9,726 MIPS at 3.2 GHz | 3.0 | 3.0 | 2003 | |
Microchip PIC10F | 1 MIPS at 4 MHz | 0.25 | 0.25 | 2004 | [63][64] |
ARM Cortex-M3 | 125 MIPS at 100 MHz | 1.25 | 1.25 | 2004 | [65] |
Nios II | 190 MIPS at 165 MHz | 1.13 | 1.13 | 2004 | [66] |
MIPS32 4KEc | 356 MIPS at 233 MHz | 1.5 | 1.5 | 2004 | [67] |
VIA C7 | 1,799 MIPS at 1.3 GHz | 1.4 | 1.4 | 2005 | [68] |
ARM Cortex-A8 | 2,000 MIPS at 1.0 GHz | 2.0 | 2.0 | 2005 | [69] |
AMD Athlon FX-57 | 12,000 MIPS at 2.8 GHz | 4.3 | 4.3 | 2005 | |
AMD Athlon 64 3800+ X2 (2-core) | 14,564 MIPS at 2.0 GHz | 7.3 | 3.6 | 2005 | [70] |
ARM Cortex-R4 | 450 MIPS at 270 MHz | 1.66 | 1.66 | 2006 | [71] |
MIPS32 24K | 604 MIPS at 400 MHz | 1.51 | 1.51 | 2006 | [72] |
PS3 Cell BE (PPE only) | 10,240 MIPS at 3.2 GHz | 3.2 | 3.2 | 2006 | |
IBM Xenon CPU (3-core) | 19,200 MIPS at 3.2 GHz | 6.0 | 2.0 | 2005 | |
AMD Athlon FX-60 (2-core) | 18,938 MIPS at 2.6 GHz | 7.3 | 3.6 | 2006 | [70] |
Intel Core 2 Extreme X6800 (2-core) | 27,079 MIPS at 2.93 GHz | 9.2 | 4.6 | 2006 | [70] |
Intel Core 2 Extreme QX6700 (4-core) | 49,161 MIPS at 2.66 GHz | 18.4 | 4.6 | 2006 | [73] |
MIPS64 20Kc | 1,370 MIPS at 600 MHz | 2.3 | 2.3 | 2007 | [74] |
P.A. Semi PA6T-1682M | 8,800 MIPS at 1.8 GHz | 4.4 | 4.4 | 2007 | [75] |
Qualcomm Scorpion (Cortex A8-like) | 2,100 MIPS at 1 GHz | 2.1 | 2.1 | 2008 | [62] |
Intel Atom N270 | 3,846 MIPS at 1.6 GHz | 2.4 | 2.4 | 2008 | [76] |
Intel Core 2 Extreme QX9770 (4-core) | 59,455 MIPS at 3.2 GHz | 18.6 | 4.6 | 2008 | [73] |
Intel Core i7 920 (4-core) | 82,300 MIPS at 2.93 GHz | 28.089 | 7.022 | 2008 | [77] |
ARM Cortex-M0 | 45 MIPS at 50 MHz | 0.9 | 0.9 | 2009 | [78] |
ARM Cortex-A9 (2-core) | 7,500 MIPS at 1.5 GHz | 5.0 | 2.5 | 2009 | [79] |
AMD Phenom II X4 940 Black Edition | 42,820 MIPS at 3.0 GHz | 14.3 | 3.5 | 2009 | [80] |
AMD Phenom II X6 1100T | 78,440 MIPS at 3.3 GHz | 23.7 | 3.9 | 2010 | [77] |
Intel Core i7 Extreme Edition 980X (6-core) | 147,600 MIPS at 3.33 GHz | 44.7 | 7.46 | 2010 | [81] |
ARM Cortex A5 | 1,256 MIPS at 800 MHz | 1.57 | 1.57 | 2011 | [69] |
ARM Cortex A7 | 2,850 MIPS at 1.5 GHz | 1.9 | 1.9 | 2011 | [62] |
Qualcomm Krait (Cortex A15-like, 2-core) | 9,900 MIPS at 1.5 GHz | 6.6 | 3.3 | 2011 | [62] |
AMD E-350 (2-core) | 10,000 MIPS at 1.6 GHz | 6.25 | 3.125 | 2011 | [82] |
Nvidia Tegra 3 (Quad core Cortex-A9) | 13,800 MIPS at 1.5 GHz | 9.2 | 2.5 | 2011 | |
Samsung Exynos 5250 (Cortex-A15-like 2-core | 14,000 MIPS at 2.0 GHz | 7.0 | 3.5 | 2011 | [83] |
Intel Core i5-2500K 4-core | 83,000 MIPS at 3.3 GHz | 25.152 | 6.288 | 2011 | [84] |
Intel Core i7 875K | 92,100 MIPS at 2.93 GHz | 31.4 | 7.85 | 2011 | [85] |
AMD FX-8150 (8-core) | 90,749 MIPS at 3.6 GHz | 25.2 | 3.15 | 2011 | [86] |
Intel Core i7 2600K | 117,160 MIPS at 3.4 GHz | 34.45 | 8.61 | 2011 | [87] |
Intel Core i7 Extreme Edition 3960X (6-core) | 176,170 MIPS at 3.3 GHz | 53.38 | 8.89 | 2011 | [88] |
AMD FX-8350 | 97,125 MIPS at 4.2 GHz | 23.1 | 2.9 | 2012 | [86][89] |
AMD FX-9590 | 115,625 MIPS at 5.0 GHz | 23.1 | 2.9 | 2012 | [77] |
Intel Core i7 3770K | 106,924 MIPS at 3.9 GHz | 27.4 | 6.9 | 2012 | [86] |
Intel Core i7 3630QM | 113,093 MIPS at 3.2 GHz | 35.3 | 8.83 | 2012 | [90] |
Intel Core i7 4770K | 133,740 MIPS at 3.9 GHz | 34.29 | 8.57 | 2013 | [86][89][91] |
Intel Core i7 5960X | 238,310 MIPS at 3.0 GHz | 79.4 | 9.92 | 2014 | [92] |
Raspberry Pi 2 | 4,744 MIPS at 1.0 GHz | 4.744 | 1.186 | 2014 | [93] |
Intel Core i7 6950X | 317,900 MIPS at 3.0 GHz | 106 | 10.6 | 2016 | [94] |
Intel Core i5 7300U | 53,840 MIPS at 2.6 GHz | 20.7 | 10.4 | 2016 | [95] |
Intel Core i7 7500U | 49,360 MIPS at 2.7 GHz | 18.3 | 9.1 | 2016 | [96] |
ARM Cortex A73 | 71,120 MIPS at 2.8 GHz | 25.4 | 6.35[97] | 2016 | |
ARM Cortex A75 | ? | ? | ? | 2017 | |
ARM Cortex A76 | ? | ? | ? | 2018 | |
Intel Core i5 8250U | 65,770 MIPS at 1.6 GHz | 41.1 | 10.3 | 2017 | [98] |
AMD Ryzen 7 1800X | 304,510 MIPS at 3.6 GHz | 84.6 | 10.6 | 2017 | [99] |
Processor / System | Dhrystone MIPS / MIPS | D IPS / clock cycles per second | D IPS / clock cycles per second / cores per die | Year | Source |
See also
- TOP500
FLOPS - floating-point operations per second- SUPS
- Benchmark (computing)
BogoMips (measurement of CPU speed made by the Linux kernel)- Instructions per cycle
- Cycles per instruction
Dhrystone (benchmark) - DMIPS integer benchmark
Whetstone (benchmark) - floating-point benchmark
Million service units (MSU)- Orders of magnitude (computing)
- Performance per watt
References
^ "Nodes, Sockets, Cores and FLOPS, Oh, My" by Dr. Mark R. Fernandez, Ph.D.
^ Gibson, J.C. (1970). The Gibson Mix (Technical Report TR 00.2043). Poughkeepsie, N.Y.: IBM Systems Development Division..mw-parser-output cite.citationfont-style:inherit.mw-parser-output .citation qquotes:"""""""'""'".mw-parser-output .citation .cs1-lock-free abackground:url("//upload.wikimedia.org/wikipedia/commons/thumb/6/65/Lock-green.svg/9px-Lock-green.svg.png")no-repeat;background-position:right .1em center.mw-parser-output .citation .cs1-lock-limited a,.mw-parser-output .citation .cs1-lock-registration abackground:url("//upload.wikimedia.org/wikipedia/commons/thumb/d/d6/Lock-gray-alt-2.svg/9px-Lock-gray-alt-2.svg.png")no-repeat;background-position:right .1em center.mw-parser-output .citation .cs1-lock-subscription abackground:url("//upload.wikimedia.org/wikipedia/commons/thumb/a/aa/Lock-red-alt-2.svg/9px-Lock-red-alt-2.svg.png")no-repeat;background-position:right .1em center.mw-parser-output .cs1-subscription,.mw-parser-output .cs1-registrationcolor:#555.mw-parser-output .cs1-subscription span,.mw-parser-output .cs1-registration spanborder-bottom:1px dotted;cursor:help.mw-parser-output .cs1-ws-icon abackground:url("//upload.wikimedia.org/wikipedia/commons/thumb/4/4c/Wikisource-logo.svg/12px-Wikisource-logo.svg.png")no-repeat;background-position:right .1em center.mw-parser-output code.cs1-codecolor:inherit;background:inherit;border:inherit;padding:inherit.mw-parser-output .cs1-hidden-errordisplay:none;font-size:100%.mw-parser-output .cs1-visible-errorfont-size:100%.mw-parser-output .cs1-maintdisplay:none;color:#33aa33;margin-left:0.3em.mw-parser-output .cs1-subscription,.mw-parser-output .cs1-registration,.mw-parser-output .cs1-formatfont-size:95%.mw-parser-output .cs1-kern-left,.mw-parser-output .cs1-kern-wl-leftpadding-left:0.2em.mw-parser-output .cs1-kern-right,.mw-parser-output .cs1-kern-wl-rightpadding-right:0.2em
^ Ted MacNeil. "Don't be Misled by MIPS". IBM magazine.
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^ US Steel News. 15-20. Industrial Relations Department of The United States Steel Corporation of Delaware. 1950–1955. p. 29.
^ Padua, David (2011-09-08). Encyclopedia of Parallel Computing. Springer Science & Business Media. ISBN 9780387097657.
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^ "Control Data Corporation, CDC-6600 & 7600". ed-thelen.org. Retrieved 2017-05-25.
^ "Control Data 6600: The Supercomputer Arrives". Dr. Dobb's. Retrieved 2017-05-25.
^ "MCS4 > IntelP4004".
^ abcdefghijk "Cost of CPU Performance Through Time 1944-2003". Archived from the original on 2014-10-09.
^ abcde "Intel Processors". 24 April 2012. Archived from the original on 2012-04-24.
^ "History of Computers and Computing, Birth of the modern computer, Electronic computer, Cray computers of Seymour Cray". history-computer.com. Retrieved 2017-05-25.
^ abcdefgh Drolez, Ludovic. "Lud's Open Source Corner".
^ ab 2 cycles per instruction [1]
^ ab 1 instruction per cycle [2]
^ ab 4 cycles per instruction [3] Archived 2015-06-09 at the Wayback Machine = 0.25 instructions per cycle
^ "intel :: dataSheets :: 8048 8035 HMOS Single Component 8-Bit Microcomputer DataSheet 1980".
^ "Sega G80 Hardware Reference". 25 October 1997. Archived from the original on 2012-02-19.
^ ab "System 16 - Irem M27 Hardware (Irem)".
^ ab 10% faster [4] than 68000 (0.175 MIPS per MHz [5])
^ ab NEC V20/V30: 250 nanoseconds per instruction @ 8 MHz
^ LINKS-1 Computer Graphics System: 257× Zilog Z8001 [6] at 10 MHz [7] (2.5 MIPS [8] Archived 2015-06-09 at the Wayback Machine) each
^ "TMS320C1x DIGITAL SIGNAL PROCESSORS" (PDF). Archived from the original (PDF) on 2014-10-06.
^ ab "32-Bit Microprocessor-NXP".
^ "ZTAT (ZeroTurnAroundTime) Microcomputers" (PDF). Archived from the original (PDF) on October 6, 2014.
^ http://www.datasheetarchive.com/dlmain/Datasheets-13/DSA-246134.pdf[permanent dead link]
^ 1 instruction per cycle [9]
^ Sega System 16: Hitachi-Motorola 68000 @ 10 MHz (1.75 MIPS), NEC-Zilog Z80 @ 4 MHz (0.58 MIPS) [10] [11], Intel 8751 @ 8 MHz [12] (8 MIPS [13]), Intel 8048 @ 6 MHz "Archived copy". Archived from the original on 2016-01-25. Retrieved 2016-08-08.CS1 maint: Archived copy as title (link) (6 MIPS [14])
^ Wikichip.org https://en.wikichip.org/wiki/acorn/microarchitectures/arm2. Retrieved 17 October 2018. Missing or empty|title=
(help)
^ Inc, InfoWorld Media Group (23 January 1989). "InfoWorld". InfoWorld Media Group, Inc. – via Google Books.
^ ab http://ipsj.ixsq.nii.ac.jp/ej/?action=pages_view_main&active_action=repository_view_main_item_detail&item_id=59745&item_no=1&page_id=13&block_id=8
^ Inc, Ziff Davis (24 November 1987). "PC Mag". Ziff Davis, Inc. – via Google Books.
^ ab "Enhanced 32-Bit Processor-NXP".
^ "TRON VLSI CPU Introduction".
^ ab "060 1987 Drivers Eyes + 1989 Winning Run" (PDF). The history of racing games. June 2007.
^ "Analog Devices - datasheet pdf" (PDF).
^ Namco System 21 hardware: 5× Texas Instruments TMS320C20 @ 25 MHz (62.5 MIPS [15]), 2× Motorola 68000 @ 12.288 MHz [16] (4.301 MIPS [17]), Motorola 68020 [18] @ 12.5 MHz (3.788 MIPS [19]), Hitachi HD63705 @ 2.048 MHz [20] (2.048 MIPS [21]), Motorola 6809 @ 3.072 MHz [22] (1.29 MIPS [23])
^ ab "Intel i860-based Bus Boards". Archived from the original on 2013-06-25.
^ Atari Hard Drivin' hardware: [24] Motorola 68000 @ 7 MHz (1.225 MIPS [25]), Motorola 68010 @ 7 MHz (1.348 MIPS [26]), 3× Texas Instruments TMS34010 @ 50 MHz (18 MIPS [27]), Analog Devices ADSP-2100 @ 8 MHz (8 MIPS [28]), Texas Instruments TMS32010 @ 20 MHz (5 MIPS "Archived copy" (PDF). Archived from the original (PDF) on 2014-10-06. Retrieved 2014-09-17.CS1 maint: Archived copy as title (link))
^ "SUPERCOMPUTER". 13 (4). doi:10.1515/piko.1990.13.4.205.
^ Wikichip.org https://en.wikichip.org/wiki/acorn/microarchitectures/arm3. Retrieved 17 October 2018. Missing or empty|title=
(help)
^ "(Including EC, LC, and V)-NXP".
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