Cannot get awk to work properly inside make [duplicate]
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This question already has an answer here:
Makefile, sqare brackets built-in, variable expansion and command substitution
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Makefile shell ignoring sed regexp end of line
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I want to parse a file and bracket each line with #ifndef and #endif.
For example, starting with:
#define X 1
#define Y 2
#define Z 3
I want to generate:
#ifndef X
#define X 1
#endif
#ifndef Y
#define Y 2
#endif
#ifndef Z
#define Z 3
#end if
This awk script works in console, but it doesn't work inside make:
awk 'printf "#ifndef %sn%s %s %sn#endifn", $2, $1, $2, $3' globals.tmp > globals.h
When run inside of make, it outputs as follows:
awk: cmd. line:1: printf "#ifndef %sn%s %s %sn#endifn", , , ,
awk: cmd. line:1: ^ syntax error
awk: cmd. line:1: printf "#ifndef %sn%s %s %sn#endifn", , , ,
awk: cmd. line:1: ^ syntax error
awk: cmd. line:1: printf "#ifndef %sn%s %s %sn#endifn", , , ,
awk: cmd. line:1: ^ syntax error
awk: cmd. line:1: printf "#ifndef %sn%s %s %sn#endifn", , , ,
awk: cmd. line:1: ^ syntax error
awk: cmd. line:1: printf "#ifndef %sn%s %s %sn#endifn", , , ,
awk: cmd. line:1: ^ unexpected newline or end of string
So it's obviously not pulling in the fields. I tried playing around with $1, $2, and $3: adding single, double and triple backslashes, changing the quotes, etc., nothing works. I know awk and make can be quirky, wondering if there is some "gotcha" I'm not getting?
awk make
asked Sep 8 at 14:29
Buddy
1614
marked as duplicate by Kusalananda, Thomas Dickey, Rui F Ribeiro, Stephen Rauch, peterh Sep 8 at 18:49
This question has been asked before and already has an answer. If those answers do not fully address your question, please ask a new question.
add a comment |Â
up vote
2
down vote
favorite
This question already has an answer here:
Makefile, sqare brackets built-in, variable expansion and command substitution
2 answers
Makefile shell ignoring sed regexp end of line
2 answers
I want to parse a file and bracket each line with #ifndef and #endif.
For example, starting with:
#define X 1
#define Y 2
#define Z 3
I want to generate:
#ifndef X
#define X 1
#endif
#ifndef Y
#define Y 2
#endif
#ifndef Z
#define Z 3
#end if
This awk script works in console, but it doesn't work inside make:
awk 'printf "#ifndef %sn%s %s %sn#endifn", $2, $1, $2, $3' globals.tmp > globals.h
When run inside of make, it outputs as follows:
awk: cmd. line:1: printf "#ifndef %sn%s %s %sn#endifn", , , ,
awk: cmd. line:1: ^ syntax error
awk: cmd. line:1: printf "#ifndef %sn%s %s %sn#endifn", , , ,
awk: cmd. line:1: ^ syntax error
awk: cmd. line:1: printf "#ifndef %sn%s %s %sn#endifn", , , ,
awk: cmd. line:1: ^ syntax error
awk: cmd. line:1: printf "#ifndef %sn%s %s %sn#endifn", , , ,
awk: cmd. line:1: ^ syntax error
awk: cmd. line:1: printf "#ifndef %sn%s %s %sn#endifn", , , ,
awk: cmd. line:1: ^ unexpected newline or end of string
So it's obviously not pulling in the fields. I tried playing around with $1, $2, and $3: adding single, double and triple backslashes, changing the quotes, etc., nothing works. I know awk and make can be quirky, wondering if there is some "gotcha" I'm not getting?
awk make
asked Sep 8 at 14:29
Buddy
1614
marked as duplicate by Kusalananda, Thomas Dickey, Rui F Ribeiro, Stephen Rauch, peterh Sep 8 at 18:49
This question has been asked before and already has an answer. If those answers do not fully address your question, please ask a new question.
1
You have to double the$characters to keepmakefrom evaluating them). That, and other useful information is in the manual page. (this is a duplicate, by the way).
– Thomas Dickey
Sep 8 at 14:35
Bracket each line, or bracket each line starting#define? There's potentially quite a difference. (Unless every single line is a#define, of course. But you don't state that.)
– roaima
Sep 8 at 15:32
@roaima - bracket each line, as it says
– Buddy
Sep 14 at 14:41
@Buddy I know that's what it says. I was seeking confirmation you really meant that, because with lines other than those of the form#define K Xyourawkscript would fail with its expectations of$1,$2,$3. So since you've confirmed that it's for "each line", what should happen when one or more of$1,$2,$3are empty?
– roaima
Sep 14 at 16:08
@roaima - the file is created by parsing a compile log to pull out all global definitions, with all lines are formatted as above - some definitions are already covered, and will cause a build error if redefined - the#ifndef#endiflines are used to protect against redefinition
– Buddy
Sep 14 at 17:51
add a comment |Â
up vote
2
down vote
favorite
up vote
2
down vote
favorite
This question already has an answer here:
Makefile, sqare brackets built-in, variable expansion and command substitution
2 answers
Makefile shell ignoring sed regexp end of line
2 answers
I want to parse a file and bracket each line with #ifndef and #endif.
For example, starting with:
#define X 1
#define Y 2
#define Z 3
I want to generate:
#ifndef X
#define X 1
#endif
#ifndef Y
#define Y 2
#endif
#ifndef Z
#define Z 3
#end if
This awk script works in console, but it doesn't work inside make:
awk 'printf "#ifndef %sn%s %s %sn#endifn", $2, $1, $2, $3' globals.tmp > globals.h
When run inside of make, it outputs as follows:
awk: cmd. line:1: printf "#ifndef %sn%s %s %sn#endifn", , , ,
awk: cmd. line:1: ^ syntax error
awk: cmd. line:1: printf "#ifndef %sn%s %s %sn#endifn", , , ,
awk: cmd. line:1: ^ syntax error
awk: cmd. line:1: printf "#ifndef %sn%s %s %sn#endifn", , , ,
awk: cmd. line:1: ^ syntax error
awk: cmd. line:1: printf "#ifndef %sn%s %s %sn#endifn", , , ,
awk: cmd. line:1: ^ syntax error
awk: cmd. line:1: printf "#ifndef %sn%s %s %sn#endifn", , , ,
awk: cmd. line:1: ^ unexpected newline or end of string
So it's obviously not pulling in the fields. I tried playing around with $1, $2, and $3: adding single, double and triple backslashes, changing the quotes, etc., nothing works. I know awk and make can be quirky, wondering if there is some "gotcha" I'm not getting?
awk make
asked Sep 8 at 14:29
Buddy
1614
This question already has an answer here:
Makefile, sqare brackets built-in, variable expansion and command substitution
2 answers
Makefile shell ignoring sed regexp end of line
2 answers
I want to parse a file and bracket each line with #ifndef and #endif.
For example, starting with:
#define X 1
#define Y 2
#define Z 3
I want to generate:
#ifndef X
#define X 1
#endif
#ifndef Y
#define Y 2
#endif
#ifndef Z
#define Z 3
#end if
This awk script works in console, but it doesn't work inside make:
awk 'printf "#ifndef %sn%s %s %sn#endifn", $2, $1, $2, $3' globals.tmp > globals.h
When run inside of make, it outputs as follows:
awk: cmd. line:1: printf "#ifndef %sn%s %s %sn#endifn", , , ,
awk: cmd. line:1: ^ syntax error
awk: cmd. line:1: printf "#ifndef %sn%s %s %sn#endifn", , , ,
awk: cmd. line:1: ^ syntax error
awk: cmd. line:1: printf "#ifndef %sn%s %s %sn#endifn", , , ,
awk: cmd. line:1: ^ syntax error
awk: cmd. line:1: printf "#ifndef %sn%s %s %sn#endifn", , , ,
awk: cmd. line:1: ^ syntax error
awk: cmd. line:1: printf "#ifndef %sn%s %s %sn#endifn", , , ,
awk: cmd. line:1: ^ unexpected newline or end of string
So it's obviously not pulling in the fields. I tried playing around with $1, $2, and $3: adding single, double and triple backslashes, changing the quotes, etc., nothing works. I know awk and make can be quirky, wondering if there is some "gotcha" I'm not getting?
This question already has an answer here:
Makefile, sqare brackets built-in, variable expansion and command substitution
2 answers
Makefile shell ignoring sed regexp end of line
2 answers
awk make
awk make
asked Sep 8 at 14:29
Buddy
1614
asked Sep 8 at 14:29
Buddy
1614
asked Sep 8 at 14:29
Buddy
1614
asked Sep 8 at 14:29
Buddy
1614
asked Sep 8 at 14:29
Buddy
1614
1614
marked as duplicate by Kusalananda, Thomas Dickey, Rui F Ribeiro, Stephen Rauch, peterh Sep 8 at 18:49
This question has been asked before and already has an answer. If those answers do not fully address your question, please ask a new question.
marked as duplicate by Kusalananda, Thomas Dickey, Rui F Ribeiro, Stephen Rauch, peterh Sep 8 at 18:49
This question has been asked before and already has an answer. If those answers do not fully address your question, please ask a new question.
1
You have to double the$characters to keepmakefrom evaluating them). That, and other useful information is in the manual page. (this is a duplicate, by the way).
– Thomas Dickey
Sep 8 at 14:35
Bracket each line, or bracket each line starting#define? There's potentially quite a difference. (Unless every single line is a#define, of course. But you don't state that.)
– roaima
Sep 8 at 15:32
@roaima - bracket each line, as it says
– Buddy
Sep 14 at 14:41
@Buddy I know that's what it says. I was seeking confirmation you really meant that, because with lines other than those of the form#define K Xyourawkscript would fail with its expectations of$1,$2,$3. So since you've confirmed that it's for "each line", what should happen when one or more of$1,$2,$3are empty?
– roaima
Sep 14 at 16:08
@roaima - the file is created by parsing a compile log to pull out all global definitions, with all lines are formatted as above - some definitions are already covered, and will cause a build error if redefined - the#ifndef#endiflines are used to protect against redefinition
– Buddy
Sep 14 at 17:51
add a comment |Â
1
You have to double the$characters to keepmakefrom evaluating them). That, and other useful information is in the manual page. (this is a duplicate, by the way).
– Thomas Dickey
Sep 8 at 14:35
Bracket each line, or bracket each line starting#define? There's potentially quite a difference. (Unless every single line is a#define, of course. But you don't state that.)
– roaima
Sep 8 at 15:32
@roaima - bracket each line, as it says
– Buddy
Sep 14 at 14:41
@Buddy I know that's what it says. I was seeking confirmation you really meant that, because with lines other than those of the form#define K Xyourawkscript would fail with its expectations of$1,$2,$3. So since you've confirmed that it's for "each line", what should happen when one or more of$1,$2,$3are empty?
– roaima
Sep 14 at 16:08
@roaima - the file is created by parsing a compile log to pull out all global definitions, with all lines are formatted as above - some definitions are already covered, and will cause a build error if redefined - the#ifndef#endiflines are used to protect against redefinition
– Buddy
Sep 14 at 17:51
1
1
You have to double the
$ characters to keep make from evaluating them). That, and other useful information is in the manual page. (this is a duplicate, by the way).– Thomas Dickey
Sep 8 at 14:35
You have to double the
$ characters to keep make from evaluating them). That, and other useful information is in the manual page. (this is a duplicate, by the way).– Thomas Dickey
Sep 8 at 14:35
Bracket each line, or bracket each line starting
#define? There's potentially quite a difference. (Unless every single line is a #define, of course. But you don't state that.)– roaima
Sep 8 at 15:32
Bracket each line, or bracket each line starting
#define? There's potentially quite a difference. (Unless every single line is a #define, of course. But you don't state that.)– roaima
Sep 8 at 15:32
@roaima - bracket each line, as it says
– Buddy
Sep 14 at 14:41
@roaima - bracket each line, as it says
– Buddy
Sep 14 at 14:41
@Buddy I know that's what it says. I was seeking confirmation you really meant that, because with lines other than those of the form
#define K X your awk script would fail with its expectations of $1, $2, $3. So since you've confirmed that it's for "each line", what should happen when one or more of $1, $2, $3 are empty?– roaima
Sep 14 at 16:08
@Buddy I know that's what it says. I was seeking confirmation you really meant that, because with lines other than those of the form
#define K X your awk script would fail with its expectations of $1, $2, $3. So since you've confirmed that it's for "each line", what should happen when one or more of $1, $2, $3 are empty?– roaima
Sep 14 at 16:08
@roaima - the file is created by parsing a compile log to pull out all global definitions, with all lines are formatted as above - some definitions are already covered, and will cause a build error if redefined - the
#ifndef #endif lines are used to protect against redefinition– Buddy
Sep 14 at 17:51
@roaima - the file is created by parsing a compile log to pull out all global definitions, with all lines are formatted as above - some definitions are already covered, and will cause a build error if redefined - the
#ifndef #endif lines are used to protect against redefinition– Buddy
Sep 14 at 17:51
add a comment |Â
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1
You have to double the
$characters to keepmakefrom evaluating them). That, and other useful information is in the manual page. (this is a duplicate, by the way).– Thomas Dickey
Sep 8 at 14:35
Bracket each line, or bracket each line starting
#define? There's potentially quite a difference. (Unless every single line is a#define, of course. But you don't state that.)– roaima
Sep 8 at 15:32
@roaima - bracket each line, as it says
– Buddy
Sep 14 at 14:41
@Buddy I know that's what it says. I was seeking confirmation you really meant that, because with lines other than those of the form
#define K Xyourawkscript would fail with its expectations of$1,$2,$3. So since you've confirmed that it's for "each line", what should happen when one or more of$1,$2,$3are empty?– roaima
Sep 14 at 16:08
@roaima - the file is created by parsing a compile log to pull out all global definitions, with all lines are formatted as above - some definitions are already covered, and will cause a build error if redefined - the
#ifndef#endiflines are used to protect against redefinition– Buddy
Sep 14 at 17:51