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I'm having some trouble understanding how I can convert a boolean expression to a NOR-gate only expression.

What I'm working with looks like $T = A B' C + A' B C' + A B$. How would I go into implementing it with NOR gates?

NAND and NOR gates are universal. So one way to solve this problem is first reduce the logic using K-maps or whatever, then draw it out with AND, OR, and NOT gates. Then use bubble pushing identity techniques to convert the gates to the desired type.

^{simulate this circuit – Schematic created using CircuitLab}

I'll provide some direction to head. Since your question isn't so much about simplification, I'll do the simplification without any further ado. Then I'll provide a direction to head from that point but I'll leave some work you'll need to perform yourself.

Simplify

Let's simplify the expression:

$$beginalign*
T &= A,overlineB,C + overlineA,B,overlineC + A,B\
&= A,overlineB,C + overlineA,B,overlineC + A,B,overlineC + A,B,C\
&= Aleft(overlineB,C + B,overlineC + B,Cright) + overlineA,B,overlineC\
&= A,overlineoverlineB,overlineC + overlineA,B,overlineC\
&= A,B + A,C + overlineA,B,overlineC\
&= A,C + Bleft(A + overlineA,overlineCright)\
&= A,C + Bleft(A + overlineCright)\
&= A,C + A,B + B,overlineC
endalign*$$

I'm not going to explain all the details above. It isn't the only, nor even the best approach to simplification. It's just one I decided to write out, off-hand. Still, you should try to take the time to understand each transition on your own. (Or not. It's up to you.)

From there, you can see that if $A$ and $B$ are both true, the expression $T=A,C+B,overlineC$ already captures the term, $A,B$, as one or the other is picked up regardless of $C$.

So the simplified version is:

$$T=A,C+B,overlineC$$

Applying the NOR gate template

The basic model of a NOR gate, as I'm sure you know, is $T=overlineR+S$. That's the template. The question is, how do you take an arbitrary expression and make it conform?

I'll start you out:

$$beginalign*
T&=A,C+B,overlineC\\
&=overlineoverlineA,C+B,overlineC\\
&=overlineoverlineA,CcdotoverlineB,overlineC\\
&=overlineleft(overlineA+overlineCright)cdotleft(overlineB+Cright)\\
&=overlineoverlineA,overlineB+overlineA,C+overlineB,overlineC\\
&=overlineoverlineAleft(overlineB+Cright)+overlineB,overlineC
endalign*$$

(If it's not immediately clear, take note that in the first transition I used a double negation. The reason is that I know the basic NOR template requires a negation of the entire underlying expression and that a very obvious and simple way to achieve that is to double-negate the entire expression. This guarantees a negation that I can keep at the top, while applying the remaining negation to the underlying expression.)

At this point, you can see that if $T=overlineR+S$ then $R=overlineAleft(overlineB+Cright)$ and $S=overlineB,overlineC$. So you are closer to an answer, now. But you have two new situations to resolve.

I'll solve $S$:

$$beginalign*
S&=overlineB,overlineC\\
&=overlineoverlineoverlineB,overlineC\\
&=overlineB+C\\
endalign*$$

And that easily fits the model of a NOR with no additional work.

You get to resolve $R$, now. Once you walk yourself through that process, you should find a requirement for exactly five NOR gates. I've only shown you the first two of them. You get to find the other three.

Your Boolean equation has the NOT, AND, and OR operators in it. DeMorgan's Law says that you can perform an AND function with a NOR gate or an OR function with a NAND gate. If you tie the two inputs of a NOR gate together, what kind of function does that give you?

Since this looks like homework, I'll let you fill in the details.

I'll give you a hint. If you missed DeMorgan's Theorem in lecture, you need to look it up. Briefly, the following two gates are identical

^{simulate this circuit – Schematic created using CircuitLab}

The rest is up to you.