What architecture is bi-endian at runtime?
Clash Royale CLAN TAG#URR8PPP
up vote
2
down vote
favorite
If I understand correctly x86_64 is a bi-arch, since it supports running native x86 and x86_64 at the same time (no reboot, no reconfiguration). ia64 is a single arch and does not support x86.
I am trying to understand which architecture supported by the Linux kernel can run in true bi-endian mode, so that the CPU can switch endianess at runtime.
I could not find definitive answer for the following arch namely ppc64(le) and mips64(le) (eg. MIPS64r6). Does one of those support running of (no reboot, no reconfiguration) respectively ppc32(be) and mips32(be) (eg. MIPS32r2) ? Maybe something in the ARM family also ?
linux-kernel architecture
asked Jul 11 at 7:35
malat
408522
add a comment |Â
up vote
2
down vote
favorite
If I understand correctly x86_64 is a bi-arch, since it supports running native x86 and x86_64 at the same time (no reboot, no reconfiguration). ia64 is a single arch and does not support x86.
I am trying to understand which architecture supported by the Linux kernel can run in true bi-endian mode, so that the CPU can switch endianess at runtime.
I could not find definitive answer for the following arch namely ppc64(le) and mips64(le) (eg. MIPS64r6). Does one of those support running of (no reboot, no reconfiguration) respectively ppc32(be) and mips32(be) (eg. MIPS32r2) ? Maybe something in the ARM family also ?
linux-kernel architecture
asked Jul 11 at 7:35
malat
408522
x86_64 can only run the 32bit subset of x86 (not legacy 16 bit, 8bit, or 4bit). Have you seen (can remember which architecture), has spiral endien: It did one endian when it went from 8 to 16bit, and the other from 16bit to 32 bit (like how americans write there dates (weird). Have a look at arm, if I remember correct, this CPU supports both at run time, though there may not be any kernel/tool support for mixing them.
– ctrl-alt-delor
Jul 11 at 7:50
1
This isn’t authoritative, but theppc64elarchitecture qualification page says that “A multi-arch arrangement with the other ports is not feasible, since the kernel doesn't support bi-endianness.†and I get the impression that the statement on the kernel is general. Themips64elpage only mentions the other little-endian MIPS architectures. I’m not aware of any endianness-swapping support in the kernel’s thunking layers.
– Stephen Kitt
Jul 11 at 8:04
add a comment |Â
up vote
2
down vote
favorite
up vote
2
down vote
favorite
If I understand correctly x86_64 is a bi-arch, since it supports running native x86 and x86_64 at the same time (no reboot, no reconfiguration). ia64 is a single arch and does not support x86.
I am trying to understand which architecture supported by the Linux kernel can run in true bi-endian mode, so that the CPU can switch endianess at runtime.
I could not find definitive answer for the following arch namely ppc64(le) and mips64(le) (eg. MIPS64r6). Does one of those support running of (no reboot, no reconfiguration) respectively ppc32(be) and mips32(be) (eg. MIPS32r2) ? Maybe something in the ARM family also ?
linux-kernel architecture
asked Jul 11 at 7:35
malat
408522
If I understand correctly x86_64 is a bi-arch, since it supports running native x86 and x86_64 at the same time (no reboot, no reconfiguration). ia64 is a single arch and does not support x86.
I am trying to understand which architecture supported by the Linux kernel can run in true bi-endian mode, so that the CPU can switch endianess at runtime.
I could not find definitive answer for the following arch namely ppc64(le) and mips64(le) (eg. MIPS64r6). Does one of those support running of (no reboot, no reconfiguration) respectively ppc32(be) and mips32(be) (eg. MIPS32r2) ? Maybe something in the ARM family also ?
linux-kernel architecture
asked Jul 11 at 7:35
malat
408522
edited Jul 11 at 8:08
asked Jul 11 at 7:35
malat
408522
asked Jul 11 at 7:35
malat
408522
asked Jul 11 at 7:35
malat
408522
408522
x86_64 can only run the 32bit subset of x86 (not legacy 16 bit, 8bit, or 4bit). Have you seen (can remember which architecture), has spiral endien: It did one endian when it went from 8 to 16bit, and the other from 16bit to 32 bit (like how americans write there dates (weird). Have a look at arm, if I remember correct, this CPU supports both at run time, though there may not be any kernel/tool support for mixing them.
– ctrl-alt-delor
Jul 11 at 7:50
1
This isn’t authoritative, but theppc64elarchitecture qualification page says that “A multi-arch arrangement with the other ports is not feasible, since the kernel doesn't support bi-endianness.†and I get the impression that the statement on the kernel is general. Themips64elpage only mentions the other little-endian MIPS architectures. I’m not aware of any endianness-swapping support in the kernel’s thunking layers.
– Stephen Kitt
Jul 11 at 8:04
add a comment |Â
x86_64 can only run the 32bit subset of x86 (not legacy 16 bit, 8bit, or 4bit). Have you seen (can remember which architecture), has spiral endien: It did one endian when it went from 8 to 16bit, and the other from 16bit to 32 bit (like how americans write there dates (weird). Have a look at arm, if I remember correct, this CPU supports both at run time, though there may not be any kernel/tool support for mixing them.
– ctrl-alt-delor
Jul 11 at 7:50
1
This isn’t authoritative, but theppc64elarchitecture qualification page says that “A multi-arch arrangement with the other ports is not feasible, since the kernel doesn't support bi-endianness.†and I get the impression that the statement on the kernel is general. Themips64elpage only mentions the other little-endian MIPS architectures. I’m not aware of any endianness-swapping support in the kernel’s thunking layers.
– Stephen Kitt
Jul 11 at 8:04
x86_64 can only run the 32bit subset of x86 (not legacy 16 bit, 8bit, or 4bit). Have you seen (can remember which architecture), has spiral endien: It did one endian when it went from 8 to 16bit, and the other from 16bit to 32 bit (like how americans write there dates (weird). Have a look at arm, if I remember correct, this CPU supports both at run time, though there may not be any kernel/tool support for mixing them.
– ctrl-alt-delor
Jul 11 at 7:50
x86_64 can only run the 32bit subset of x86 (not legacy 16 bit, 8bit, or 4bit). Have you seen (can remember which architecture), has spiral endien: It did one endian when it went from 8 to 16bit, and the other from 16bit to 32 bit (like how americans write there dates (weird). Have a look at arm, if I remember correct, this CPU supports both at run time, though there may not be any kernel/tool support for mixing them.
– ctrl-alt-delor
Jul 11 at 7:50
1
1
This isn’t authoritative, but the
ppc64el architecture qualification page says that “A multi-arch arrangement with the other ports is not feasible, since the kernel doesn't support bi-endianness.†and I get the impression that the statement on the kernel is general. The mips64el page only mentions the other little-endian MIPS architectures. I’m not aware of any endianness-swapping support in the kernel’s thunking layers.– Stephen Kitt
Jul 11 at 8:04
This isn’t authoritative, but the
ppc64el architecture qualification page says that “A multi-arch arrangement with the other ports is not feasible, since the kernel doesn't support bi-endianness.†and I get the impression that the statement on the kernel is general. The mips64el page only mentions the other little-endian MIPS architectures. I’m not aware of any endianness-swapping support in the kernel’s thunking layers.– Stephen Kitt
Jul 11 at 8:04
add a comment |Â
active
oldest
votes
active
oldest
votes
active
oldest
votes
active
oldest
votes
active
oldest
votes
Sign up or log in
StackExchange.ready(function ()
StackExchange.helpers.onClickDraftSave('#login-link');
);
Sign up using Google
Sign up using Facebook
Sign up using Email and Password
Post as a guest
StackExchange.ready(
function ()
StackExchange.openid.initPostLogin('.new-post-login', 'https%3a%2f%2funix.stackexchange.com%2fquestions%2f454629%2fwhat-architecture-is-bi-endian-at-runtime%23new-answer', 'question_page');
);
Post as a guest
Sign up or log in
StackExchange.ready(function ()
StackExchange.helpers.onClickDraftSave('#login-link');
);
Sign up using Google
Sign up using Facebook
Sign up using Email and Password
Post as a guest
Sign up or log in
StackExchange.ready(function ()
StackExchange.helpers.onClickDraftSave('#login-link');
);
Sign up using Google
Sign up using Facebook
Sign up using Email and Password
Post as a guest
Sign up or log in
StackExchange.ready(function ()
StackExchange.helpers.onClickDraftSave('#login-link');
);
Sign up using Google
Sign up using Facebook
Sign up using Email and Password
Sign up using Google
Sign up using Facebook
Sign up using Email and Password
x86_64 can only run the 32bit subset of x86 (not legacy 16 bit, 8bit, or 4bit). Have you seen (can remember which architecture), has spiral endien: It did one endian when it went from 8 to 16bit, and the other from 16bit to 32 bit (like how americans write there dates (weird). Have a look at arm, if I remember correct, this CPU supports both at run time, though there may not be any kernel/tool support for mixing them.
– ctrl-alt-delor
Jul 11 at 7:50
1
This isn’t authoritative, but the
ppc64elarchitecture qualification page says that “A multi-arch arrangement with the other ports is not feasible, since the kernel doesn't support bi-endianness.†and I get the impression that the statement on the kernel is general. Themips64elpage only mentions the other little-endian MIPS architectures. I’m not aware of any endianness-swapping support in the kernel’s thunking layers.– Stephen Kitt
Jul 11 at 8:04